- 02 2月, 2009 2 次提交
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由 Wolfgang Grandegger 提交于
Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Reynes Philippe 提交于
Signed-off-by: NPhilippe Reynes <philippe.reynes@isismpp.fr> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 29 1月, 2009 12 次提交
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由 Martyn Welch 提交于
This patch adds basic support for the 6 GPIO lines found on GE Fanucs SBC310 to the GE Fanuc GPIO driver. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Martyn Welch 提交于
Support for the SBC310 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This is the default config file for GE Fanuc's SBC310, a 3U single board computer, based on Freescale's MPC8641D. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Martyn Welch 提交于
Support for the SBC310 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This is the basic board support for GE Fanuc's SBC310, a 3U single board computer, based on Freescale's MPC8641D. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
The FSL PCI code depends on PCI quirks being enabled to function properly. We can ensure this by doing a select in Kconfig of PCI_QUIRKS. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Reynes Philippe 提交于
Signed-off-by: NPhilippe Reynes <philippe.reynes@isismpp.fr> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Laurent Pinchart 提交于
Instead of rounding the divider down, improve the baud-rate generators accuracy by rounding to the nearest integer. Signed-off-by: NLaurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Trent Piepho 提交于
On booke processors, the code that maps low memory only uses up to three CAM entries, even though there are sixteen and nothing else uses them. Make this number configurable in the advanced options menu along with max low memory size. If one wants 1 GB of lowmem, then it's typically necessary to have four CAM entries. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Trent Piepho 提交于
The code that maps kernel low memory would only use page sizes up to 256 MB. On E500v2 pages up to 4 GB are supported. However, a page must be aligned to a multiple of the page's size. I.e. 256 MB pages must aligned to a 256 MB boundary. This was enforced by a requirement that the physical and virtual addresses of the start of lowmem be aligned to 256 MB. Clearly requiring 1GB or 4GB alignment to allow pages of that size isn't acceptable. To solve this, I simply have adjust_total_lowmem() take alignment into account when it decides what size pages to use. Give it PAGE_OFFSET = 0x7000_0000, PHYSICAL_START = 0x3000_0000, and 2GB of RAM, and it will map pages like this: PA 0x3000_0000 VA 0x7000_0000 Size 256 MB PA 0x4000_0000 VA 0x8000_0000 Size 1 GB PA 0x8000_0000 VA 0xC000_0000 Size 256 MB PA 0x9000_0000 VA 0xD000_0000 Size 256 MB PA 0xA000_0000 VA 0xE000_0000 Size 256 MB Because the lowmem mapping code now takes alignment into account, PHYSICAL_ALIGN can be lowered from 256 MB to 64 MB. Even lower might be possible. The lowmem code will work down to 4 kB but it's possible some of the boot code will fail before then. Poor alignment will force small pages to be used, which combined with the limited number of TLB1 pages available, will result in very little memory getting mapped. So alignments less than 64 MB probably aren't very useful anyway. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Trent Piepho 提交于
The code to map lowmem uses three CAM aka TLB[1] entries to cover it. The size of each is stored in three globals named __cam0, __cam1, and __cam2. All the code that uses them is duplicated three times for each of the three variables. We have these things called arrays and loops.... Once converted to use an array, it will be easier to make the number of CAMs configurable. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
We currently have a few variants of fsl-booke processors (e500v1, e500v2, e500mc, and e200). They all have minor differences that we had previously been handling via ifdefs. To move towards having this support the following changes have been made: * PID1, PID2 only exist on e500v1 & e500v2 and should not be accessed on e500mc or e200. We use MMUCFG[NPIDS] to determine which case we are since we only touch PID1/2 in extremely early init code. * Not all IVORs exist on all the processors so introduce cpu_setup functions for each variant to setup the proper IVORs that are either unique or exist but have some variations between the processors Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Anton Vorontsov 提交于
This patch adds pcie nodes to the appropriate dts files, plus adds some probing code for the boards. Also, remove of_device_is_avaliable() check from the mpc837x_mds.c board file, as mpc83xx_add_bridge() has the same check now. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Anton Vorontsov 提交于
This patch adds support for PCI-Express controllers as found on the newer MPC83xx chips. The work is loosely based on the Tony Li's patch[1], but unlike the original patch, this patch implements sliding window for the Type 1 transactions using outbound window translations, so we don't have to ioremap the whole PCI-E configuration space. [1] http://ozlabs.org/pipermail/linuxppc-dev/2008-January/049028.htmlSigned-off-by: NTony Li <tony.li@freescale.com> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 28 1月, 2009 5 次提交
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由 Gerhard Pircher 提交于
_PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL. Thus it has to be masked out, if the BAT mapping should be non cacheable or CPU_FTR_NEED_COHERENT is not set. This will work on normal SMP setups because we force-set CPU_FTR_NEED_COHERENT as part of CPU_FTR_COMMON on SMP. Signed-off-by: NGerhard Pircher <gerhard_pircher@gmx.net> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Robert Jennings 提交于
In the VIO bus code the wrappers for dma alloc_coherent and free_coherent calls are rounding to IOMMU_PAGE_SIZE. Taking a look at the underlying calls, the actual mapping is promoted to PAGE_SIZE. Changing the rounding in these two functions fixes under-reporting the entitlement used by the system. Without this change, the system could run out of entitlement before it believes it has and incur mapping failures at the firmware level. Also in the VIO bus code, the wrapper for dma map_sg is not exiting in an error path where it should. Rather than fall through to code for the success case, this patch adds the return that is needed in the error path. Signed-off-by: NRobert Jennings <rcj@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Josh Boyer 提交于
Remove some leftover cruft from the arch/ppc days Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Stephen Rothwell 提交于
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 David Brownell 提交于
The DaVinci code had an implementation of the OTG transceiver glue too; make it use the new-standard one. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Acked-by: NFelipe Balbi <felipe.balbi@nokia.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 27 1月, 2009 16 次提交
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由 Matt Waddel 提交于
The 5329 ColdFire peripheral IO register addresses are not relative to the MBAR register. So fix the serial platform setup array and IRQ acking to use just the direct addresses. Signed-off-by: NMatt Waddel <Matt.Waddel@freescale.com> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
Make restart blocks working, required for proper syscall restarting. Derived from same changes for m68k arch by Andreas Schwab <schwab@suse.de> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Adrian Bunk 提交于
Signed-off-by: NAdrian Bunk <bunk@kernel.org> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Adrian Bunk 提交于
Greg Ungerer said about this board: Only ever a handful where made, and that was in 1999. Signed-off-by: NAdrian Bunk <bunk@kernel.org> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Adrian Bunk 提交于
m68knommu does not set the Kconfig NO_DMA variable, but also does not provide the required functions, resulting in the following build error triggered by commit a40c24a1 (net: Add SKB DMA mapping helper functions.): <-- snip --> .. LD vmlinux net/built-in.o: In function `skb_dma_unmap': (.text+0xac5e): undefined reference to `dma_unmap_single' net/built-in.o: In function `skb_dma_unmap': (.text+0xac7a): undefined reference to `dma_unmap_page' net/built-in.o: In function `skb_dma_map': (.text+0xacdc): undefined reference to `dma_map_single' net/built-in.o: In function `skb_dma_map': (.text+0xace8): undefined reference to `dma_mapping_error' net/built-in.o: In function `skb_dma_map': (.text+0xad10): undefined reference to `dma_map_page' net/built-in.o: In function `skb_dma_map': (.text+0xad82): undefined reference to `dma_unmap_page' net/built-in.o: In function `skb_dma_map': (.text+0xadc6): undefined reference to `dma_unmap_single' make[1]: *** [vmlinux] Error 1 <-- snip --> Signed-off-by: NAdrian Bunk <bunk@kernel.org> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Greg Ungerer 提交于
Fix cache flushing for the 527x ColdFire processors Its CACR register format is slightly different. Along with this add support for flushing the 523x cache, which uses the same format as the 527x ColdFire's, and was missing flush support. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Sebastian Siewior 提交于
Part of the code that did not make sense to me got removed by Greg. This is part two: The first compare is to check whether the interrupts are disabled or not. Depending on the result we exectute the RESTORE_ALL macro is not only restoring the stack but also returning to caller. The test for pending softirq has been removed because it is allready done in irq_exit(). Since system_call() is allso using the SAVE_ALL macro and returning via ret_from_exception label I see no reason why we could not do this here as well. This is also handy because if we return from the timer interrupt and we need to resched than we check for this :) Signed-off-by: NSebastian Siewior <bigeasy@linutronix.de> Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Li Yang 提交于
Probe the new mdio node added by b31a1d8b. Fix kernel panic problem when gianfar driver wants to get the of_platform_device of that mdio. Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jean Delvare 提交于
Now that all EEPROM drivers live in the same place, let's harmonize their symbol names. Also fix eeprom's dependencies, it definitely needs sysfs, and is no longer experimental after many years in the kernel tree. Signed-off-by: NJean Delvare <khali@linux-fr.org> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Cc: David Brownell <dbrownell@users.sourceforge.net>
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由 Harvey Harrison 提交于
swab.h seems to have been missed during the header merge. Add conditionals similar to byteorder.h and remove the now unnecessary byteorder_no/mm.h Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 26 1月, 2009 5 次提交
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由 Rakib Mullick 提交于
Here function vmi_activate calls a init function activate_vmi , which causes the following section mismatch warnings: LD arch/x86/kernel/built-in.o WARNING: arch/x86/kernel/built-in.o(.text+0x13ba9): Section mismatch in reference from the function vmi_activate() to the function .init.text:vmi_time_init() The function vmi_activate() references the function __init vmi_time_init(). This is often because vmi_activate lacks a __init annotation or the annotation of vmi_time_init is wrong. WARNING: arch/x86/kernel/built-in.o(.text+0x13bd1): Section mismatch in reference from the function vmi_activate() to the function .devinit.text:vmi_time_bsp_init() The function vmi_activate() references the function __devinit vmi_time_bsp_init(). This is often because vmi_activate lacks a __devinit annotation or the annotation of vmi_time_bsp_init is wrong. WARNING: arch/x86/kernel/built-in.o(.text+0x13bdb): Section mismatch in reference from the function vmi_activate() to the function .devinit.text:vmi_time_ap_init() The function vmi_activate() references the function __devinit vmi_time_ap_init(). This is often because vmi_activate lacks a __devinit annotation or the annotation of vmi_time_ap_init is wrong. Fix it by marking vmi_activate() as __init too. Signed-off-by: NRakib Mullick <rakib.mullick@gmail.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Impact: fix boot hang on pre-model-15 Intel CPUs rdmsrl_safe() does not work in very early bootup code yet, because we dont have the pagefault handler installed yet so exception section does not get parsed. rdmsr_safe() will just crash and hang the bootup. So limit the MSR_IA32_MISC_ENABLE MSR read to those CPU types that support it. Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Tejun Heo 提交于
The EH message for NODEV_HINT path was describing the opposite condition. Fix it. Signed-off-by: NTejun Heo <tj@kernel.org> Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
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由 Eric Anholt 提交于
In the absence of PAT, PAGE_KERNEL_WC ends up mapping to a memory type that gets UC behavior even in the presence of a WC MTRR covering the area in question. By swapping to PAGE_KERNEL_UC_MINUS, we can get the actual behavior the caller wanted (WC if you can manage it, UC otherwise). This recovers the 40% performance improvement of using WC in the DRM to upload vertex data. Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Russell King 提交于
Tomi Valkeinen reports: Running with latest linux-omap kernel on OMAP3 SDP board, I have problem with iounmap(). It looks like iounmap() does not properly free large areas. Below is a test which fails for me in 6-7 loops. for (i = 0; i < 200; ++i) { vaddr = ioremap(paddr, size); if (!vaddr) { printk("couldn't ioremap\n"); break; } iounmap(vaddr); } The changes to vmalloc.c weren't reflected in the ARM ioremap implementation. Turns out the fix is rather simple. Tested-by: NTomi Valkeinen <tomi.valkeinen@nokia.com> Tested-by: NMatt Gerassimoff <mgeras@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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