no-one use it and it's nearly impossible get a board to work on it
and the Mainline implementation was never finished
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>

as we can not detect it
by defaut the type will be bga
introduce cpu_is_at91rm9200_bga and cpu_is_at91rm9200_pqfp
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

select ARM_PATCH_PHYS_VIRT
as with ARM_PATCH_PHYS_VIRT you can patch boot_params at runtime or any recent
bootloader will provide a valid atags pointer in r2

as point out by Russell on AT91 we never use XIP
so se do not need PLAT_PHYS_OFFSET
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>

we do not change the clock naming convention so does not need to switch
the AVR32 yet
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

switch early init to init_early and introduce soc map_io

with this Patch we will not do any more early device setup during the map io

tks to Russell to point the new call back
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NAndrew Victor <linux@maxim.org.za>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>

specify the port num via platform_data this will allow to match the clock
with the plaform_dev staticaly
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>

and update it with ubi, sound, nfs support etc...
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>

Tested on at91sam9263ek
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Grégory Hermant <gregory.hermant@calao-systems.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>

no board configure it as 'n' and it's an issue to merge all defconfigs
in one

On AT91SAM926x boards both types of NAND flash can be present
(8 and 16 bit data bus width).

so will pass it via system_rev
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

This specifies the new per-platform timeout per I2C bus and
switches the I2C buses to fast mode, and increase the FIFO
depth to 8 for reads and writes.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The I2C speed enumerators in the i2c-nomadik header file were in
the wrong order.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add option to have different i2c timeout delay for different i2c buses
specified in platform data. Default to the old value unless specified.
Signed-off-by: NVirupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>
Reviewed-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

bcmring has a set of four sp804 timers incorporated, yet it has its
own copy of the sp804 code.  Convert its clockevent implementation
to the standard sp804 support code.

Cc: Jiandong Zheng <jdzheng@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

bcmring has a set of four sp804 timers incorporated, yet it has its
own copy of the sp804 code.  Convert its clocksource implementation
to the standard sp804 support code.

Cc: Jiandong Zheng <jdzheng@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Move adding clkdev table to init_early to make sure the common sp804 clockevents can be initialized properly.
Signed-off-by: NJiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the rate of the SP804 clockevent via
the clk subsystem.  While ARM boards clock these at 1MHz, BCMRing also
has SP804 timers but are clocked at different rates.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the clcokevent name upon registration.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the rate of the SP804 clocksource via
the clk subsystem.  While ARM boards clock these at 1MHz, BCMRing also
has SP804 timers but are clocked at different rates.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This allows platforms to specify the clocksource name upon
registration, which is necessary should they wish to register more
than one sp804 clocksource.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert the OMAP1 32-bit down counting clocksource to the generic
clocksource infrastructure.
Tested-by: NTony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert the MXS timrotv2 32-bit down counting clocksource to the
generic clocksource infrastructure.

Cc: Sascha Hauer <kernel@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@freescale.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert SPEAr platforms 16-bit up counting clocksource, which requires
a 16-bit register access read rather than 32-bit.
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert the Integrator/AP 16-bit down-counting clocksource to the
generic clocksource infrastructure.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert the W90x900 24-bit down-counting clocksource to the generic
mmio clocksource infrastructure
Acked-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources
to generic mmio clocksource infrastructure.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Alessandro Rubini <rubini@unipv.it>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: NNicolas Pitre <nico@fluxnic.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert ixp4xx, lpc32xx, mxc, netx, pxa, sa1100, tcc8k, tegra and u300
to use the generic mmio clocksource recently introduced.

Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Acked-by: N"Hans J. Koch" <hjk@hansjkoch.de>
Acked-by: NColin Cross <ccross@android.com>
Cc: Erik Gilling <konkers@android.com>
Cc: Olof Johansson <olof@lixom.net>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update sa1100 clockevents code to reflect what its later derivative
does with clockevents_calc_mult_shift().  Use OSSR_M* constants too.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Tested-by: NTony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The OMAP1 clocksource interrupt handler just increments a variable
which otherwise isn't used, so this seems to be unnecessary.  Tony
Lindgren confirms, so lets remove it.
Acked-by: NKevin Hilman <khilman@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

s5p duplicates the runtime selection of the timer register three times.
Move this out into a separate function.

FIXME: It is unclear whether this code needs to support true runtime
selection of the timer register, or whether it can be selected once at
init time.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

ARM build fails with the following symptom:

  CC      arch/arm/kernel/asm-offsets.s
In file included from include/linux/seqlock.h:29,
                 from include/linux/time.h:8,
                 from include/linux/timex.h:56,
                 from include/linux/sched.h:57,
                 from arch/arm/kernel/asm-offsets.c:13:
include/linux/spinlock.h: In function 'spin_unlock_wait':
include/linux/spinlock.h:360: error: implicit declaration of function 'cpu_relax'
make[1]: *** [arch/arm/kernel/asm-offsets.s] Error 1

Fix it by including <asm/processor.h>.
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Commit e2a083dc0da9aa6437e14811198379b18cdfa7f8
"ARM: consolidate SMP cross call implementation" broke the ux500
compilation since the smp.h header declared a function called
from headsmp.S. This fixes it up by declaring it locally instead.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Rather than having each platform class provide a mach/smp.h header for
smp_cross_call(), arrange for them to register the function with the
core ARM SMP code instead.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

As a result of c42321c7 (genirq: Make generic irq chip depend on
CONFIG_GENERIC_IRQ_CHIP), we now need those platforms using this in
my tree to select this symbol.
Acked-by: NThomas Gleixner <tglx@linutronix.de>
Acked-by: NNicolas Pitre <nico@fluxnic.net>
Acked-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The generic chip infrastructure has had a Kconfig symbol added so we need
to select that for the kernel to link now we're using the generic IRQ
chip infrastructure.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When initialising a PMU, there is a check to protect against races with
other CPUs filling all of the available event slots. Since armpmu_add
checks that an event can be scheduled, we do not need to do this at
initialisation time. Furthermore the current code is broken because it
assumes that atomic_inc_not_zero will unconditionally increment
active_counts and then tries to decrement it again on failure.

This patch removes the broken, redundant code.
Signed-off-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NWill Deacon <will.deacon@arm.com>
Cc: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NSaeed Bishara <saeed@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Reviewed-by: NStanley Miao <stanley.miao@windriver.com>
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>