1. 22 4月, 2016 2 次提交
    • L
      x86/ACPI: Parse ACPI_FADT_LEGACY_DEVICES · 7a17b82c
      Luis R. Rodriguez 提交于
      ACPI 5.2.9.3 IA-PC Boot Architecture flag ACPI_FADT_LEGACY_DEVICES
      can be used to determine if a system has legacy devices LPC or
      ISA devices. The x86 platform already has a struct which lists
      known associated legacy devices, we start off careful only
      by disabling root devices we should not regress with. The struct
      and device list can be expanded with time to cover more root
      legacy components.
      Signed-off-by: NLuis R. Rodriguez <mcgrof@kernel.org>
      Cc: Andy Lutomirski <luto@amacapital.net>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Brian Gerst <brgerst@gmail.com>
      Cc: Denys Vlasenko <dvlasenk@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: andrew.cooper3@citrix.com
      Cc: andriy.shevchenko@linux.intel.com
      Cc: bigeasy@linutronix.de
      Cc: boris.ostrovsky@oracle.com
      Cc: david.vrabel@citrix.com
      Cc: ffainelli@freebox.fr
      Cc: george.dunlap@citrix.com
      Cc: glin@suse.com
      Cc: jgross@suse.com
      Cc: jlee@suse.com
      Cc: josh@joshtriplett.org
      Cc: julien.grall@linaro.org
      Cc: konrad.wilk@oracle.com
      Cc: kozerkov@parallels.com
      Cc: lenb@kernel.org
      Cc: lguest@lists.ozlabs.org
      Cc: linux-acpi@vger.kernel.org
      Cc: lv.zheng@intel.com
      Cc: matt@codeblueprint.co.uk
      Cc: mbizon@freebox.fr
      Cc: rjw@rjwysocki.net
      Cc: robert.moore@intel.com
      Cc: rusty@rustcorp.com.au
      Cc: tiwai@suse.de
      Cc: toshi.kani@hp.com
      Cc: xen-devel@lists.xensource.com
      Link: http://lkml.kernel.org/r/1460592286-300-13-git-send-email-mcgrof@kernel.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      7a17b82c
    • L
      x86/ACPI: Move ACPI_FADT_NO_CMOS_RTC check to ACPI boot code · 088a8ef8
      Luis R. Rodriguez 提交于
      This moves the ACPI specific check into the ACPI boot code,
      it also takes advantage of the x86_platform.legacy.rtc which
      is checked for already on the RTC initialization code. This
      lets us remove the nasty #ifdefery and consolidate the checks
      to use only one toggle to disable the RTC init code.
      
      The works as RTC is initialized by device_initcall(add_rtc_cmos),
      this will run late in boot on start_kernel() during rest_init(),
      acpi_parse_fadt() gets called earlier during setup_arch().
      Signed-off-by: NLuis R. Rodriguez <mcgrof@kernel.org>
      Cc: Andy Lutomirski <luto@amacapital.net>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Brian Gerst <brgerst@gmail.com>
      Cc: Denys Vlasenko <dvlasenk@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: andrew.cooper3@citrix.com
      Cc: andriy.shevchenko@linux.intel.com
      Cc: bigeasy@linutronix.de
      Cc: boris.ostrovsky@oracle.com
      Cc: david.vrabel@citrix.com
      Cc: ffainelli@freebox.fr
      Cc: george.dunlap@citrix.com
      Cc: glin@suse.com
      Cc: jgross@suse.com
      Cc: jlee@suse.com
      Cc: josh@joshtriplett.org
      Cc: julien.grall@linaro.org
      Cc: konrad.wilk@oracle.com
      Cc: kozerkov@parallels.com
      Cc: lenb@kernel.org
      Cc: lguest@lists.ozlabs.org
      Cc: linux-acpi@vger.kernel.org
      Cc: lv.zheng@intel.com
      Cc: matt@codeblueprint.co.uk
      Cc: mbizon@freebox.fr
      Cc: rjw@rjwysocki.net
      Cc: robert.moore@intel.com
      Cc: rusty@rustcorp.com.au
      Cc: tiwai@suse.de
      Cc: toshi.kani@hp.com
      Cc: xen-devel@lists.xensource.com
      Link: http://lkml.kernel.org/r/1460592286-300-6-git-send-email-mcgrof@kernel.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      088a8ef8
  2. 24 2月, 2016 1 次提交
  3. 15 10月, 2015 1 次提交
    • L
      x86, ACPI: Handle apic/x2apic entries in MADT in correct order · d81056b5
      Lukasz Anaczkowski 提交于
      ACPI specifies the following rules when listing APIC IDs:
      (1) Boot processor is listed first
      (2) For multi-threaded processors, BIOS should list the first logical
          processor of each of the individual multi-threaded processors in MADT
          before listing any of the second logical processors.
      (3) APIC IDs < 0xFF should be listed in APIC subtable, APIC IDs >= 0xFF
          should be listed in X2APIC subtable
      
      Because of above, when there's more than 0xFF logical CPUs, BIOS
      interleaves APIC/X2APIC subtables.
      
      Assuming, there's 72 cores, 72 hyper-threads each, 288 CPUs total,
      listing is like this:
      
      APIC (0,4,8, .., 252)
      X2APIC (258,260,264, .. 284)
      APIC (1,5,9,...,253)
      X2APIC (259,261,265,...,285)
      APIC (2,6,10,...,254)
      X2APIC (260,262,266,..,286)
      APIC (3,7,11,...,251)
      X2APIC (255,261,262,266,..,287)
      
      Now, before this patch, due to how ACPI MADT subtables were parsed (BSP
      then X2APIC then APIC), kernel enumerated CPUs in reverted order (i.e.
      high APIC IDs were getting low logical IDs, and low APIC IDs were
      getting high logical IDs).
      This is wrong for the following reasons:
      () it's hard to predict how cores and threads are enumerated
      () when it's hard to predict, s/w threads cannot be properly affinitized
         causing significant performance impact due to e.g. inproper cache
         sharing
      () enumeration is inconsistent with how threads are enumerated on
         other Intel Xeon processors
      
      So, order in which MADT APIC/X2APIC handlers are passed is
      reverse and both handlers are passed to be called during same MADT
      table to walk to achieve correct CPU enumeration.
      
      In scenario when someone boots kernel with options 'maxcpus=72 nox2apic',
      in result less cores may be booted, since some of the CPUs the kernel
      will try to use will have APIC ID >= 0xFF. In such case, one
      should not pass 'nox2apic'.
      
      Disclimer: code parsing MADT APIC/X2APIC has not been touched since 2009,
      when X2APIC support was initially added. I do not know why MADT parsing
      code was added in the reversed order in the first place.
      I guess it didn't matter at that time since nobody cared about cores
      with APIC IDs >= 0xFF, right?
      
      This patch is based on work of "Yinghai Lu <yinghai@kernel.org>"
      previously published at https://lkml.org/lkml/2013/1/21/563
      
      Here's the explanation why parsing interface needs to be changed
      and why simpler approach will not work https://lkml.org/lkml/2015/9/7/285Signed-off-by: NLukasz Anaczkowski <lukasz.anaczkowski@intel.com>
      Acked-by: Thomas Gleixner <tglx@linutronix.de> (commit message)
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      d81056b5
  4. 27 8月, 2015 1 次提交
    • J
      ACPI, PCI: Penalize legacy IRQ used by ACPI SCI · 5d0ddfeb
      Jiang Liu 提交于
      Nick Meier reported a regression with HyperV that "
        After rebooting the VM, the following messages are logged in syslog
        when trying to load the tulip driver:
          tulip: Linux Tulip drivers version 1.1.15 (Feb 27, 2007)
          tulip: 0000:00:0a.0: PCI INT A: failed to register GSI
          tulip: Cannot enable tulip board #0, aborting
          tulip: probe of 0000:00:0a.0 failed with error -16
        Errors occur in 3.19.0 kernel
        Works in 3.17 kernel.
      "
      
      According to the ACPI dump file posted by Nick at
      https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1440072
      
      The ACPI MADT table includes an interrupt source overridden entry for
      ACPI SCI:
      [236h 0566  1]                Subtable Type : 02 <Interrupt Source Override>
      [237h 0567  1]                       Length : 0A
      [238h 0568  1]                          Bus : 00
      [239h 0569  1]                       Source : 09
      [23Ah 0570  4]                    Interrupt : 00000009
      [23Eh 0574  2]        Flags (decoded below) : 000D
                                         Polarity : 1
                                     Trigger Mode : 3
      
      And in DSDT table, we have _PRT method to define PCI interrupts, which
      eventually goes to:
              Name (PRSA, ResourceTemplate ()
              {
                  IRQ (Level, ActiveLow, Shared, )
                      {3,4,5,7,9,10,11,12,14,15}
              })
              Name (PRSB, ResourceTemplate ()
              {
                  IRQ (Level, ActiveLow, Shared, )
                      {3,4,5,7,9,10,11,12,14,15}
              })
              Name (PRSC, ResourceTemplate ()
              {
                  IRQ (Level, ActiveLow, Shared, )
                      {3,4,5,7,9,10,11,12,14,15}
              })
              Name (PRSD, ResourceTemplate ()
              {
                  IRQ (Level, ActiveLow, Shared, )
                      {3,4,5,7,9,10,11,12,14,15}
              })
      
      According to the MADT and DSDT tables, IRQ 9 may be used for:
       1) ACPI SCI in level, high mode
       2) PCI legacy IRQ in level, low mode
      So there's a conflict in polarity setting for IRQ 9.
      
      Prior to commit cd68f6bd ("x86, irq, acpi: Get rid of special
      handling of GSI for ACPI SCI"), ACPI SCI is handled specially and
      there's no check for conflicts between ACPI SCI and PCI legagy IRQ.
      And it seems that the HyperV hypervisor doesn't make use of the
      polarity configuration in IOAPIC entry, so it just works.
      
      Commit cd68f6bd gets rid of the specially handling of ACPI SCI,
      and then the pin attribute checking code discloses the conflicts
      between ACPI SCI and PCI legacy IRQ on HyperV virtual machine,
      and rejects the request to assign IRQ9 to PCI devices.
      
      So penalize legacy IRQ used by ACPI SCI and mark it unusable if ACPI
      SCI attributes conflict with PCI IRQ attributes.
      
      Please refer to following links for more information:
      https://bugzilla.kernel.org/show_bug.cgi?id=101301
      https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1440072
      
      Fixes: cd68f6bd ("x86, irq, acpi: Get rid of special handling of GSI for ACPI SCI")
      Reported-and-tested-by: NNick Meier <nmeier@microsoft.com>
      Acked-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: 3.19+ <stable@vger.kernel.org> # 3.19+
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      5d0ddfeb
  5. 21 7月, 2015 1 次提交
  6. 19 5月, 2015 1 次提交
  7. 24 4月, 2015 4 次提交
    • T
      x86: Cleanup irq_domain ops · f7a0c786
      Thomas Gleixner 提交于
      We have 3 identical copies of the ioapic domain ops for acpi, mpparse,
      and sfi. Have a global one in the io_apic code and be done with it.
      
      To avoid include hell in io_apic.h, create a private irqdomain header
      and include the generic irqdomain header from there.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: David Cohen <david.a.cohen@linux.intel.com>
      Cc: Sander Eikelenboom <linux@eikelenboom.it>
      Cc: David Vrabel <david.vrabel@citrix.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: sfi-devel@simplefirmware.org
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Dimitri Sivanich <sivanich@sgi.com>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <robh@kernel.org>
      Cc: x86@kernel.org
      Link: http://lkml.kernel.org/r/1428978610-28986-32-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      f7a0c786
    • J
      x86/irq, ACPI: Remove private function mp_register_gsi()/ mp_unregister_gsi() · 46176f39
      Jiang Liu 提交于
      Function mp_register_gsi() is only called once, so fold it into caller
      acpi_register_gsi_ioapic(). Do the same for mp_unregister_gsi().
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Tested-by: NJoerg Roedel <jroedel@suse.de>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: David Cohen <david.a.cohen@linux.intel.com>
      Cc: Sander Eikelenboom <linux@eikelenboom.it>
      Cc: David Vrabel <david.vrabel@citrix.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Dimitri Sivanich <sivanich@sgi.com>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1428978610-28986-29-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      46176f39
    • J
      x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces · d32932d0
      Jiang Liu 提交于
      Convert IOAPIC driver to support and use hierarchical irqdomain
      interfaces.  It's a little big, but would break bisecting if we split
      it into multiple patches.
      
      Fold in a patch from Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      to make it bisectable.
      http://lkml.org/lkml/2014/12/10/622Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Tested-by: NJoerg Roedel <jroedel@suse.de>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Sander Eikelenboom <linux@eikelenboom.it>
      Cc: David Vrabel <david.vrabel@citrix.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: sfi-devel@simplefirmware.org
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Dimitri Sivanich <sivanich@sgi.com>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <robh@kernel.org>
      Cc: David Rientjes <rientjes@google.com>
      Cc: David Cohen <david.a.cohen@linux.intel.com>
      Link: http://lkml.kernel.org/r/1428905519-23704-38-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      d32932d0
    • J
      x86/irq: Prepare IOAPIC interfaces to support hierarchical irqdomains · c4d05a2c
      Jiang Liu 提交于
      Introduce helper functions to manipulate struct irq_alloc_info for
      IOAPIC.  Also add an extra parameter to IOAPIC interfaces to prepare
      for hierarchical irqdomain. Function mp_set_gsi_attr() will be removed
      once we have switched to hierarchical irqdomains.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Tested-by: NJoerg Roedel <jroedel@suse.de>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Sander Eikelenboom <linux@eikelenboom.it>
      Cc: David Vrabel <david.vrabel@citrix.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Dimitri Sivanich <sivanich@sgi.com>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Jan Beulich <JBeulich@suse.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: David Cohen <david.a.cohen@linux.intel.com>
      Link: http://lkml.kernel.org/r/1428905519-23704-33-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      c4d05a2c
  8. 26 3月, 2015 1 次提交
  9. 12 3月, 2015 1 次提交
  10. 18 2月, 2015 1 次提交
  11. 06 2月, 2015 1 次提交
  12. 22 1月, 2015 1 次提交
  13. 20 1月, 2015 1 次提交
    • J
      x86/xen: Treat SCI interrupt as normal GSI interrupt · b568b860
      Jiang Liu 提交于
      Currently Xen Domain0 has special treatment for ACPI SCI interrupt,
      that is initialize irq for ACPI SCI at early stage in a special way as:
      xen_init_IRQ()
      	->pci_xen_initial_domain()
      		->xen_setup_acpi_sci()
      			Allocate and initialize irq for ACPI SCI
      
      Function xen_setup_acpi_sci() calls acpi_gsi_to_irq() to get an irq
      number for ACPI SCI. But unfortunately acpi_gsi_to_irq() depends on
      IOAPIC irqdomains through following path
      acpi_gsi_to_irq()
      	->mp_map_gsi_to_irq()
      		->mp_map_pin_to_irq()
      			->check IOAPIC irqdomain
      
      For PV domains, it uses Xen event based interrupt manangement and
      doesn't make uses of native IOAPIC, so no irqdomains created for IOAPIC.
      This causes Xen domain0 fail to install interrupt handler for ACPI SCI
      and all ACPI events will be lost. Please refer to:
      https://lkml.org/lkml/2014/12/19/178
      
      So the fix is to get rid of special treatment for ACPI SCI, just treat
      ACPI SCI as normal GSI interrupt as:
      acpi_gsi_to_irq()
      	->acpi_register_gsi()
      		->acpi_register_gsi_xen()
      			->xen_register_gsi()
      
      With above change, there's no need for xen_setup_acpi_sci() anymore.
      The above change also works with bare metal kernel too.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Tested-by: NSander Eikelenboom <linux@eikelenboom.it>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: xen-devel@lists.xenproject.org
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: David Vrabel <david.vrabel@citrix.com>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Link: http://lkml.kernel.org/r/1421720467-7709-2-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      b568b860
  14. 06 1月, 2015 1 次提交
  15. 16 12月, 2014 6 次提交
  16. 29 10月, 2014 1 次提交
  17. 20 10月, 2014 1 次提交
  18. 12 7月, 2014 1 次提交
  19. 22 6月, 2014 13 次提交
    • J
      x86, irq, ACPI: Release IOAPIC pin when PCI device is disabled · 6a38fa0e
      Jiang Liu 提交于
      Release IOAPIC pin associated with PCI device when the PCI device
      is disabled.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402380987-32577-1-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      6a38fa0e
    • J
      x86, irq: Simplify the way to handle ISA IRQ · 16ee7b3d
      Jiang Liu 提交于
      On startup, setup_IO_APIC_irqs() will program all IOAPIC pins for ISA
      IRQs. Later when mp_map_pin_to_irq() is called, it just returns ISA IRQ
      number without programming corresponding IOAPIC pin.
      
      This patch consolidates the way to program IOAPIC pins for both ISA and
      non-ISA IRQs into mp_map_pin_to_irq() as below:
      1) For ISA IRQs, mp_irqs array is used to map IOAPIC pin to IRQ and
         mp_irqdomain_map() is used to actually program the pin.
      2) For non-ISA IRQs, irqdomain is used to map IOAPIC pin to IRQ, and
         mp_irqdomain_map() is also used to actually program the pin.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402302011-23642-36-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      16ee7b3d
    • J
      x86, irq, ACPI: Use common irqdomain map interface to program IOAPIC pins · d7b83001
      Jiang Liu 提交于
      Refine ACPI to use common irqdomain map interface to program IOAPIC pins,
      so we can unify the callsite to progam IOAPIC pins.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402302011-23642-31-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      d7b83001
    • J
      x86, ACPI, irq: Provide basic irqdomain support · ca7e28aa
      Jiang Liu 提交于
      Enhance ACPI driver to provide basic irqdomain support for IOAPIC.
      
      We will build identity mapping for IOAPICs hosting legacy IRQs,
      otherwise dynamically allocate IRQ numbers for IOAPIC pins on demand.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402302011-23642-26-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      ca7e28aa
    • J
      x86, irq: Enhance mp_register_ioapic() to support irqdomain · 44767bfa
      Jiang Liu 提交于
      Enhance function mp_register_ioapic() to support irqdomain.
      When registering IOAPIC, caller may provide callbacks and parameters
      for creating irqdomain. The IOAPIC core will create irqdomain later
      if caller has passed in corresponding parameters.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: sfi-devel@simplefirmware.org
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Tony Lindgren <tony@atomide.com>
      Link: http://lkml.kernel.org/r/1402302011-23642-25-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      44767bfa
    • J
      x86, irq: Introduce mechanisms to support dynamically allocate IRQ for IOAPIC · d7f3d478
      Jiang Liu 提交于
      Currently x86 support identity mapping between GSI(IOAPIC pin) and IRQ
      number, so continous IRQs at low end are statically allocated to IOAPICs
      at boot time. This design causes trouble to support IOAPIC hotplug.
      
      This patch implements basic mechanism to dynamically allocate IRQ on
      demand for IOAPIC pins by using irqdomain framework.
      
      It first adds several fields into struct ioapic to support irqdomain.
      Then it implements an algorithm to dynamically allocate IRQ number
      for IOAPIC pins on demand.
      
      Currently it supports three types of irqdomain:
      1) LEGACY: used to support IOAPIC hosting legacy IRQs and building
         identity mapping for legacy IRQs. A speical case, we dynamically
         allocate IRQ number for IOAPIC pin which has GSI number below
         nr_legacy_irqs() but isn't legacy IRQ. This is for backward
         compatibility and avoid regression.
      2) STRICT: build identity mapping between GSI and IRQ nubmer.
      3) DYNAMIC: dynamically allocate IRQ number for IOAPIC pin on demand.
      
      Legacy(ISA) IRQs is not managed by irqdomain because there may be
      multiple pins sharing the same IRQ number and current irqdomain only
      supports 1:1 mapping between pins and IRQ.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402302011-23642-24-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      d7f3d478
    • J
      x86, irq, ACPI: Change __acpi_register_gsi to return IRQ number instead of GSI · 84245af7
      Jiang Liu 提交于
      Currently __acpi_register_gsi is defined to return GSI number and
      may be set to acpi_register_gsi_pic(), acpi_register_gsi_ioapic(),
      acpi_register_gsi_xen_hvm() and acpi_register_gsi_xen().
      
      Among which, acpi_register_gsi_ioapic() returns GSI number, but
      acpi_register_gsi_xen_hvm() and acpi_register_gsi_xen() actually
      returns IRQ number instead of GSI. And for acpi_register_gsi_pic(),
      GSI number equals to IRQ number.
      
      So change acpi_register_gsi_ioapic() to return IRQ number, it also
      simplifies the code.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402380887-32512-1-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      84245af7
    • J
      x86, ACPI, irq: Consolidate algorithm of mapping (ioapic, pin) to IRQ number · 6b9fb708
      Jiang Liu 提交于
      Currently ACPI and ioapic both implement algorithms to map (ioapic, pin)
      to IRQ number. So consolidate the common part into one place, which is
      also preparing for irqdomain support.
      
      It introduces mp_map_gsi_to_irq(), which will be used to allocate IRQ
      number IOAPIC pins when irqdomain is enabled.
      
      Also rename gsi_to_irq() to map_gsi_to_irq(), later we will introduce
      unmap_gsi_to_irq() when enabling IOAPIC hotplug.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402380812-32446-1-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      6b9fb708
    • J
      x86, irq: Count legacy IRQs by legacy_pic->nr_legacy_irqs instead of NR_IRQS_LEGACY · 95d76acc
      Jiang Liu 提交于
      Some platforms, such as Intel MID and mshypv, do not support legacy
      interrupt controllers. So count legacy IRQs by legacy_pic->nr_legacy_irqs
      instead of hard-coded NR_IRQS_LEGACY.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: xen-devel@lists.xenproject.org
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Tony Lindgren <tony@atomide.com>
      Acked-by: NDavid Vrabel <david.vrabel@citrix.com>
      Link: http://lkml.kernel.org/r/1402302011-23642-20-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      95d76acc
    • J
      x86, ACPI, irq: Fix possible eror in GSI to IRQ mapping for legacy IRQ · 2e0ad0e2
      Jiang Liu 提交于
      A default identity mapping between GSI and IRQ is built for legacy IRQs.
      So when overriding the default identity mapping for legacy IRQs,
      we should also invalidate isa_irq_to_gsi[gsi] when setting
      isa_irq_to_gsi[irq] = gsi.  Otherwise there may be two entries with the
      same GSI in the isa_irq_to_gsi array, and acpi_isa_irq_to_gsi() may give
      wrong result.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402302011-23642-10-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      2e0ad0e2
    • J
      x86, ACPI, irq: Enhance error handling in function acpi_register_gsi() · 2c0a6894
      Jiang Liu 提交于
      Function mp_register_gsi() may return error code when failed to look up
      or program corresponding IOAPIC pin for GSI, so enhance acpi_register_gsi()
      to handle possible error cases.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402380683-32345-1-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      2c0a6894
    • J
      x86, ACPI, trivial: Minor improvements to arch/x86/kernel/acpi/boot.c · e819813f
      Jiang Liu 提交于
      1) Remove out-of-date comment
      2) Kill unused function acpi_set_irq_model_pic()
      3) Use NR_IRQS_LEGACY instead of hard-coded 16
      4) Trivial syntax improvements
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Jiri Kosina <trivial@kernel.org>
      Link: http://lkml.kernel.org/r/1402302011-23642-8-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      e819813f
    • J
      x86, acpi, irq: Kill static function irq_to_gsi() · 032329ee
      Jiang Liu 提交于
      Static function irq_to_gsi() is only called by acpi_isa_irq_to_gsi(),
      so kill function irq_to_gsi() and simplify acpi_isa_irq_to_gsi().
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402302011-23642-7-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      032329ee