This adds locking of the detector's shared pulse and PRI sequence
pools to enable multi-wiphy operation on SMP systems.
Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This adds a DFS pattern detector to ath9k. It is fed with pulse events
by the radar pulse detector and reports in place whether a pattern
was detected. On detection, the result is reported as radar event to
the DFS management component in the upper layer.

Currently the ETSI DFS domain is supported with detector lines for
the patterns defined by EN-301-893 v1.5.1. Support for FCC and JP
will be added gradually.

To include the pattern detector, ath9k must be built with support
for DFS certified config flag set (CONFIG_ATH9K_DFS_CERTIFIED).
Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>