Now that there is a generic IRQ handler for multiple VIC devices use it
for s3c64xx to help building multi platform kernels.

Cc: Ben Dooks <ben-linux@fluff.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

Now that there is a generic IRQ handler for multiple VIC devices use it
for nomadik to help building multi platform kernels.

Cc: Alessandro Rubini <rubini@unipv.it>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: STEricsson <STEricsson_nomadik_linux@list.st.com>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

Now that there is a generic IRQ handler for multiple VIC devices use it
for netx to help building multi platform kernels.
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

Now that there is a generic IRQ handler for multiple VIC devices use it
for ep93xx to help building multi platform kernels.

Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

Add a handler for the VIC that is suitable for MULTI_IRQ_HANDLER
platforms.  This can replace the ASM entry macros for platforms that use
the VIC.

v4:	- rebase ontop of move __exception and friends to
	  asm/exception.h
	- rework polling loop to handle as many irqs as possible in one go
v3:	- simplify irq handling loop as suggested by Grant
	- service interrupts from msb->lsb order
v2:	- allow the handler be used for !CONFIG_OF
	- use irq_domain_to_irq()

Cc: Rob Herring <robherring2@gmail.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

This adds a device tree binding for the VIC based on the of_irq_init()
support.  This adds an irqdomain to the vic and always registers all
vics in the static vic array rather than for pm only to keep track of
the irq domain.  struct irq_data::hwirq is used where appropriate rather
than runtime masking.

v3:	- include linux/export.h for THIS_MODULE
v2:	- use irq_domain_simple_ops
	- remove stub implementation of vic_of_init for !CONFIG_OF
	- Make VIC select IRQ_DOMAIN
Reviewed-by: NRob Herring <robherring2@gmail.com>
Reviewed-by: NGrant Likely <grant.likely@secretlab.ca>
Tested-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NJamie Iles <jamie@jamieiles.com>

Now that MULTI_IRQ_HANDLER is selected by all the in-tree
GIC users, make it mandatory and remove the unused macros.
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

After the MULTI_IRQ_HANDLER conversion, a couple of global
variables can be removed.
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the omap2plus platforms to be using CONFIG_MULTI_IRQ_HANDLER.
Each machine is modified to provide either omap2_intc_handle_irq(),
omap3_intc_handle_irq() or gic_handle_irq().

This allows for a major cleanup, removing the MULTI_OMAP setup
from the interrupt path.

Tested on both Panda and IGEPv2 (single kernel image)
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Provide the OMAP2/3 IRQ code with low level handlers that can be used
by platforms using CONFIG_MULTI_IRQ_HANDLER. Though the handlers are
written in C, the compiled code looks very similar to its assembly
counterpart (at least with my gcc 4.4.1).
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the zynq platform to be using the gic_handle_irq
function as its primary interrupt handler.
Acked-by: NJohn Linn <john.linn@xilinx.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the cns3xxx platform to be using the gic_handle_irq
function as its primary interrupt handler.
Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the SMP shmobile platforms to use gic_handle_irq() instead
of the assembly macro.

Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the ux500 platforms to be using the gic_handle_irq
function as their primary interrupt handler.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the tegra2 platforms to be using the gic_handle_irq
function as their primary interrupt handler.

Tested on harmony.

Cc: Colin Cross <ccross@android.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the Exynos4 platforms to be using the gic_handle_irq
function as their primary interrupt handler.

Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the SMP msm platforms to be using the gic_handle_irq
function as their primary interrupt handler.
Tested-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the VExpress platform to be using the gic_handle_irq
function as its primary interrupt handler.
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the RealView platforms to be using the gic_handle_irq
function as their primary interrupt handler.
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the highbank platform to be using the gic_handle_irq
function as its primary interrupt handler.

Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Convert the SMP imx platforms to use the global gic_handle_irq()
function instead a private function.

Cc: Sascha Hauer <kernel@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Provide the GIC code with a low level handler that can be used
by platforms using CONFIG_MULTI_IRQ_HANDLER.
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Before introducing a global gic_handle_irq(), rename
MXC's version to mxc_gic_handle_irq(). This function will be
removed altogether in a later patch.

Cc: Sascha Hauer <kernel@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Even when CONFIG_MULTI_IRQ_HANDLER is selected, the core code
requires the arch_irq_handler_default macro to be defined as
a fallback.

It turns out nobody is using that particular feature as both PXA
and shmobile have all their machine descriptors populated with
the interrupt handler, leaving unused code (or empty macros) in
their entry-macro.S file just to be able to compile entry-armv.S.

Make CONFIG_MULTI_IRQ_HANDLER exclusive wrt arch_irq_handler_default,
which allows to remove one test from the hot path. Also cleanup both
PXA and shmobile entry-macro.S.

Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Tested-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

The GIC support code is heavily using the fact that hardware
implementations are exposing banked registers. Unfortunately, it
looks like at least one GIC implementation (EXYNOS) offers both
the distributor and the CPU interfaces at different addresses,
depending on the CPU.

This problem is solved by allowing the distributor and CPU interface
addresses to be per-cpu variables for the platforms that require it.
The EXYNOS code is updated not to mess with the GIC internals while
handling interrupts, and struct gic_chip_data is back to being private.
The DT binding for the gic is updated to allow an optional "cpu-offset"
value, which is used to compute the various base addresses.

Finally, a new config option (GIC_NON_BANKED) is used to control this
feature, so the overhead is only present on kernels compiled with
support for EXYNOS.

Tested on Origen (EXYNOS4) and Panda (OMAP4).

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

The following error is seen in some case when mounting rootfs from
SD/MMC cards.

  Waiting for root device /dev/mmcblk0p1...
  mmc1: host does not support reading read-only switch. assuming write-enable.
  mmc1: new high speed SDHC card at address b368
  mmcblk0: mmc1:b368 SDC   3.74 GiB
   mmcblk0: p1
  mmc1: Timeout waiting for hardware interrupt.
  mmcblk0: error -110 transferring data, sector 3678224, nr 40, cmd response 0x900, card status 0xc00
  end_request: I/O error, dev mmcblk0, sector 3678225
  Buffer I/O error on device mmcblk0p1, logical block 458754
  lost page write due to I/O error on mmcblk0p1

This patch fixes the problem by lowering the usdhc clock and correcting
watermark configuration.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Chris Ball <cjb@laptop.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The AUTO_ZRELADDR selection for ARCH_IMX_V4_V5 and ARCH_MX5 should
really be mutually exclusive to ZBOOT_ROM just like what ARCH_IMX_V6_V7
does.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The config symbol ARCH_MX3 has been removed by commit 'a89cf59b
arm/imx: merge i.MX3 and i.MX6', and it should not be referenced
any more.

The patch also change ARCH_MX* to SOC_IMX* for other platforms.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The following commits break cpuidle on SH-Mobile ARM:

46bcfad7 cpuidle: Single/Global registration of idle states
e978aa7d cpuidle: Move dev->last_residency update to driver enter routine; remove dev->last_state

This patch remedies these issues by up-porting the SH-Mobile
code to fit with the above introduced framework changes.

It is worth noting that the new code becomes significantly cleaner,
so these framework changes are very welcome. At the same time this
breakage could probably have been avoided by grepping for "last_state"
and "cpuidle_register_driver".
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch moves PORT_xx helper macro to sh_pfc.h,
and it expects CPU_ALL_PORT() macro for each CPU
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch move PORT_DATA_xx helper macro to sh_pfc.h.
and pfc-sh7372.c used it
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

it is not necessary to have sh7372_xxxx index on static variable
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds MMC data pin pull-up option for pfc-sh73a0.c,
and select it on ag5evm board.
The MMC read/write will be error without this patch.

Cc: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The runtime PM platform support stub in use by ARM-based SH/R-Mobile
platforms contains nothing that's specifically ARM-related and instead of
wholly generic to anything using the clock framework.

The recent runtime PM changes interact rather badly with the lazy
disabling of clocks late in the boot process through the clock framework,
leading to situations where the runtime suspend/resume paths are entered
without a clock being actively driven due to having been lazily gated
off.

In order to correct this we can trivially tie in the aforementioned stub
as a general fallback for all SH platforms that don't presently have
their own runtime PM implementations (the corner case being SH-based
SH-Mobile platforms, which have their own stub through the hwblk API --
which in turn has bitrotted and will be subsequently adapted to use the
same stub as everyone else), regardless of whether the platforms choose
to define power domains of their own or not.

This fixes up regressions for clock framework users who also build in
runtime PM support without any specific power domains of their own, which
was previously causing the serial console to be lost when warring with
lazy clock disabling.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Enable the headphone detection gpio on tegra platform.
Signed-off-by: NYufeng Shen <miletus@chromium.org>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Ventana uses the same SDHCI GPIOs as Seaboard; PI6 (70) is the power GPIO
for the SD port, and there is no power GPIO for the MMC chip.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>