1. 27 9月, 2006 15 次提交
  2. 26 9月, 2006 6 次提交
  3. 01 9月, 2006 1 次提交
  4. 27 8月, 2006 3 次提交
  5. 20 8月, 2006 1 次提交
  6. 16 8月, 2006 1 次提交
  7. 12 8月, 2006 2 次提交
  8. 04 8月, 2006 5 次提交
  9. 01 8月, 2006 1 次提交
  10. 31 7月, 2006 1 次提交
  11. 26 7月, 2006 1 次提交
  12. 13 7月, 2006 3 次提交
    • K
      [PATCH] PCI: PCIE power management quirk · ffadcc2f
      Kristen Carlson Accardi 提交于
      When changing power states from D0->DX and then from DX->D0, some
      Intel PCIE chipsets will cause a device reset to occur.  This will
      cause problems for any D State other than D3, since any state
      information that the driver will expect to be present coming from
      a D1 or D2 state will have been cleared.  This patch addes a
      flag to the pci_dev structure to indicate that devices should
      not use states D1 or D2, and will set that flag for the affected
      chipsets.  This patch also modifies pci_set_power_state() so that
      when a device driver tries to set the power state on
      a device that is downstream from an affected chipset, or on one
      of the affected devices it only allows state changes to or
      from D0 & D3.  In addition, this patch allows the delay time
      between D3->D0 to be changed via a quirk.  These chipsets also
      need additional time to change states beyond the normal 10ms.
      Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ffadcc2f
    • M
      [PATCH] PCI: Clear abnormal poweroff flag on VIA southbridges, fix resume · 709cf5ea
      Matthew Garrett 提交于
      Some VIA southbridges contain a flag in the ACPI register space that
      indicates whether an abnormal poweroff has occured, presumably with the
      intention that it can be cleared on clean shutdown.  Some BIOSes check this
      flag at resume time, and will re-POST the system rather than jump back to
      the OS if it's set.  Clearing it at boot time appears to be sufficient.
      I'm not sure if drivers/pci/quirks.c is the right place to do it, but I'm
      not sure where would be cleaner.
      
      [akpm@osdl.org: cleanups, build fix]
      Signed-off-by: NMatthew Garrett <mjg59@srcf.ucam.org>
      Cc: Greg KH <greg@kroah.com>
      Cc: "Brown, Len" <len.brown@intel.com>
      Cc: "Yu, Luming" <luming.yu@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      709cf5ea
    • A
      [PATCH] ide: fix Jmicron support · 15e0c694
      Alan Cox 提交于
      Prior to 2.6.18rc1 you could install with devices on a JMicron chipset
      using the "all-generic-ide" option. As of this kernel the AHCI driver
      grabs the controller and rams it into AHCI mode losing the PATA ports
      and making CD drives and the like vanish. The all-generic-ide option
      fails because the AHCI driver grabbed the PCI device and reconfigured
      it.
      
      To fix this three things are needed.
      
      #1 We must put the chip into dual function mode
      #2 The AHCI driver must grab only function 0 (already in your rc1 tree)
      #3 Something must grab the PATA ports
      
      The attached patch is the minimal risk edition of this. It puts the chip
      into dual function mode so that AHCI will grab the SATA ports without
      losing the PATA ports. To keep the risk as low as possible the third
      patch adds the PCI identifiers for the PATA port and the FN check to the
      ide-generic driver. There is a more featured jmicron driver on its way
      but that adds risk and the ide-generic support is sufficient to install
      and run a system.
      
      The actual chip setup done by the quirk is the precise setup recommended
      by the vendor.
      
      (The JMB368 appears only in the ide-generic entry as it has no AHCI so
      does not need the quirk)
      Signed-off-by: NAlan Cox <alan@redhat.com>
      Acked-by: NJeff Garzik <jgarzik@pobox.com>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      15e0c694