- 27 9月, 2006 15 次提交
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由 Satoru Takeuchi 提交于
Cleanup pcihp skeleton code. Fix some typos and remove some unnecessary blank lines. Signed-off-by: NSatoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Michael S. Tsirkin 提交于
Restore PCI Express capability registers after PM event. This includes maxumum MTU for PCI express and other vital data. Signed-off-by: NMichael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Adrian Bunk 提交于
Signed-off-by: NAdrian Bunk <bunk@stusta.de> Acked-by: NMUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Alan Cox 提交于
There are numerous drivers that can use multithreaded probing but having some kind of global flag as the way to control this makes migration to threaded probing hard and since it enables it everywhere and is almost as likely to cause serious pain as holding a clog dance in a minefield. If we have a pci_driver multithread_probe flag to inherit you can turn it on for one driver at a time. From playing so far however I think we need a different model at the device layer which serializes until the called probe function says "ok you can start another one now". That would need some kind of flag and semaphore plus a helper function. Anyway in the absence of that this is a starting point to usefully play with this stuff Signed-off-by: NAlan Cox <alan@redhat.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Greg Kroah-Hartman 提交于
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Greg Kroah-Hartman 提交于
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Greg Kroah-Hartman 提交于
Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Zhang, Yanmin 提交于
Patch 4 implements error handlers for pcie_portdrv. Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Zhang, Yanmin 提交于
Patch 3 implements the core part of PCI-Express AER and aerdrv port service driver. When a root port service device is probed, the aerdrv will call request_irq to register irq handler for AER error interrupt. When a device sends an PCI-Express error message to the root port, the root port will trigger an interrupt, by either MSI or IO-APIC, then kernel would run the irq handler. The handler collects root error status register and schedules a work. The work will call the core part to process the error based on its type (Correctable/non-fatal/fatal). As for Correctable errors, the patch chooses to just clear the correctable error status register of the device. As for the non-fatal error, the patch follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. As for the fatal error, the patch resets the pci-express link and follows generic PCI error handler rules to call the error callback functions of the endpoint's driver. If the device is a bridge, the patch chooses to broadcast the error to downstream devices. Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Zhang, Yanmin 提交于
Patch 2 exports pcie_port_bus_type. Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Randy Dunlap 提交于
Have pcie_port_bus_register() notice and return errors. Mark it __must_check so that its caller(s) must check its return value. Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Brice Goglin 提交于
Introduce msi_ht_cap_enabled() to check the MSI capability in the Hypertransport configuration space. It is used in a generic quirk quirk_msi_ht_cap() to check whether MSI is enabled on hypertransport chipset, and a nVidia specific quirk quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to be checked. Both quirks set the PCI_BUS_FLAGS_NO_MSI bus flag when MSI is disabled. Signed-off-by: NBrice Goglin <brice@myri.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Brice Goglin 提交于
Export the PCI_BUS_FLAGS_NO_MSI flag of a PCI bus in the sysfs files of its parent device and make it writable. Could be used to: * disable MSI on a device which has not been blacklisted yet * allow MSI when some setpci hacks enable MSI support (for instance on the ServerWorks HT2000 chipset where the MSI HT cap is disabled by default). Architecture where some bus have no parent chipset cannot use this strategy to change MSI support. If the chipset does not have a subordinate bus, its 'bus_msi' file is empty. Also document and warn about the possible danger of changing the flag. Signed-off-by: NBrice Goglin <brice@myri.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Brice Goglin 提交于
pci_enable_msi() and pci_enable_msix() use the same code to detect whether MSI might be enabled on this device. Factorize this code in pci_msi_supported(). And improve the documentation about the fact that only the root chipset must support MSI, but it is hard to find the root bus so we check all parent busses MSI flags. Signed-off-by: NBrice Goglin <brice@myri.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Brice Goglin 提交于
Move MSI quirks in CONFIG_PCI_MSI, document why the serverworks quirk does not simply set PCI_BUS_FLAGS_NO_MSI, and create a generic quirk for other chipsets where setting PCI_BUS_FLAGS_NO_MSI is fine. Signed-off-by: NBrice Goglin <brice@myri.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 26 9月, 2006 6 次提交
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由 Andi Kleen 提交于
Some buggy systems can machine check when config space accesses happen for some non existent devices. i386/x86-64 do some early device scans that might trigger this. Allow pci=noearly to disable this. Also when type 1 is disabling also don't do any early accesses which are always type1. This moves the pci= configuration parsing to be a early parameter. I don't think this can break anything because it only changes a single global that is only used by PCI. Cc: gregkh@suse.de Cc: Trammell Hudson <hudson@osresearch.net> Signed-off-by: NAndi Kleen <ak@suse.de>
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由 Greg Kroah-Hartman 提交于
This provides a build and run-time option to turn on multhreaded probe for all PCI drivers. It can cause bad problems on multi-processor machines that take a while to find their root disks, and play havoc on machines that don't use persistant device names for block or network devices. But it can cause speedups on some machines, my tiny laptop's boot goes up by 0.4 seconds, and my desktop boots up several seconds faster. Use at your own risk!!! Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Randy.Dunlap 提交于
Make sysfs_remove_bin_file() void. If it detects an error, printk the file name and call dump_stack(). sysfs_hash_and_remove() now returns an error code indicating its success or failure so that sysfs_remove_bin_file() can know success/failure. Convert the only driver that checked the return value of sysfs_remove_bin_file(). Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 David Brownell 提交于
Remove the new suspend_prepare() phase. It doesn't seem very usable, has never been tested, doesn't address fault cleanup, and would need a sibling resume_complete(); plus there are no real use cases. It could be restored later if those issues get resolved. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: Linus Torvalds <torvalds@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 David Brownell 提交于
Convert some framework code to handle the new PRETHAW message. - IDE just treats it like a FREEZE. - The pci_choose_state() thingie still doesn't use PCI_D0 when it gets a FREEZE (and now PRETHAW) event, which seems rather buglike but wasn't something to change with this patch. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Pavel Machek <pavel@ucw.cz> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Linus Torvalds 提交于
Changes the PCI core to use the new suspend infrastructure changes. Signed-off-by: NLinus Torvalds <torvalds@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 01 9月, 2006 1 次提交
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由 Mark Hindley 提交于
Patch to add VIA PCI quirk for Enhanced/Extended USB on VT8235 southbridge. It is needed in order to use EHCI/USB 2.0 with ACPI. Without it IRQs are not routed correctly, you get an "Unlink after no-IRQ?" error and the device is unusable. I belive this could also be a fix for Bugzilla Bug 5835. Signed-off-by: NMark Hindley <mark@hindley.org.uk> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 27 8月, 2006 3 次提交
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由 Henrik Kretzschmar 提交于
Removes an unused kerneldoc entry from pci_match_device and put the others into correct order. Signed-off-by: NHenrik Kretzschmar <henne@nachtwindheim.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Scott Murray 提交于
Here is a patch against the CPCI hotplug core to fix up PCI resource assignment such that things will actually work when a hot inserted device is enabled. I mentioned this patch to you way back in April at ELC, but am only now out from under things enough to clean it up and submit it. I've basically cribbed the corresponding code from shpchp_pci.c, so there are no big surprises. If it's still possible, I wouldn't mind this going into 2.6.18, but it wouldn't be the end of the world if it went into 2.6.19. Signed-off-by: NScott Murray <scottm@somanetworks.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Daniel Ritz 提交于
- add the ICH6(R) LPC to the ICH6 ACPI quirks. currently only the ICH6-M is handled. [ PCI_DEVICE_ID_INTEL_ICH6_1 is the ICH6-M LPC, ICH6_0 is the ICH6(R) ] - remove the wrong quirk calling asus_hides_smbus_lpc() for ICH6. the register modified in asus_hides_smbus_lpc() has a different meaning in ICH6. Signed-off-by: NDaniel Ritz <daniel.ritz@gmx.ch> Acked-by: NJean Delvare <khali@linux-fr.org> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 20 8月, 2006 1 次提交
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由 Tejun Heo 提交于
drivers/pci/quirks.c was not updated when libata config constants were renamed braking several libata quirks. Fix it. Signed-off-by: NTejun Heo <htejun@gmail.com> Signed-off-by: NJeff Garzik <jeff@garzik.org>
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- 16 8月, 2006 1 次提交
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由 Kristen Carlson Accardi 提交于
Change the build options for acpiphp so that it may build without being dependent on the ACPI_DOCK option, but yet does not allow the option of acpiphp being built-in when dock is built as a module. This does not change the previous patch for ACPI_IBM_DOCK Kconfig. For the following matrix of config options, I built an i386 kernel. Dock acpiphp should it build? confirmed y y y y y n y y y m y y m y no - acpiphp should acpiphp was convert to m converted to m m n y y m m y y n y y y n n y y n m y y Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 12 8月, 2006 2 次提交
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由 Dave Jones 提交于
Nothing in the tree references this config option. Signed-off-by: NDave Jones <davej@redhat.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Kristen Carlson Accardi 提交于
Make pciehp build on powerpc Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com> Acked-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 04 8月, 2006 5 次提交
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由 Jean Delvare 提交于
Unhide the SMBus controller on the Asus PU-DLS board. This fixes bug #6763. Signed-off-by: NJean Delvare <khali@linux-fr.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Kristen Carlson Accardi 提交于
Add acpiphp to the MAINTAINERS file. Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Randy Dunlap 提交于
EXPORTed symbols cannot be __init/__devinit. Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Randy Dunlap 提交于
If pcie_portdrv_probe() fails but it had already called pci_enable_device(), then call pci_disable_device() when returning error. Is there some reason that this isn't being done? or was it just missed? Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Henrik Kretzschmar 提交于
Signed-off-by: NHenrik Kretzschmar <henne@nachtwindheim.de> Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 01 8月, 2006 1 次提交
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由 Randy Dunlap 提交于
Clean up kernel-doc comments in drivers/pci/search.c (line sizes and typos). Enable that source file in DocBook/kernel-api.tmpl. Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 31 7月, 2006 1 次提交
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由 Jeremy Kerr 提交于
Now that get_property() returns a void *, there's no need to cast its return value. Also, treat the return value as const, so we can constify get_property later. pseries platform changes. Built for pseries_defconfig Signed-off-by: NJeremy Kerr <jk@ozlabs.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 26 7月, 2006 1 次提交
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由 Bjorn Helgaas 提交于
Without this quirk, e100 can be pulling on a shared interrupt line when another device (eg. USB) loads, causing the interrupt to scream and get disabled. http://bugzilla.kernel.org/show_bug.cgi?id=5918Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 13 7月, 2006 3 次提交
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由 Kristen Carlson Accardi 提交于
When changing power states from D0->DX and then from DX->D0, some Intel PCIE chipsets will cause a device reset to occur. This will cause problems for any D State other than D3, since any state information that the driver will expect to be present coming from a D1 or D2 state will have been cleared. This patch addes a flag to the pci_dev structure to indicate that devices should not use states D1 or D2, and will set that flag for the affected chipsets. This patch also modifies pci_set_power_state() so that when a device driver tries to set the power state on a device that is downstream from an affected chipset, or on one of the affected devices it only allows state changes to or from D0 & D3. In addition, this patch allows the delay time between D3->D0 to be changed via a quirk. These chipsets also need additional time to change states beyond the normal 10ms. Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Matthew Garrett 提交于
Some VIA southbridges contain a flag in the ACPI register space that indicates whether an abnormal poweroff has occured, presumably with the intention that it can be cleared on clean shutdown. Some BIOSes check this flag at resume time, and will re-POST the system rather than jump back to the OS if it's set. Clearing it at boot time appears to be sufficient. I'm not sure if drivers/pci/quirks.c is the right place to do it, but I'm not sure where would be cleaner. [akpm@osdl.org: cleanups, build fix] Signed-off-by: NMatthew Garrett <mjg59@srcf.ucam.org> Cc: Greg KH <greg@kroah.com> Cc: "Brown, Len" <len.brown@intel.com> Cc: "Yu, Luming" <luming.yu@intel.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Alan Cox 提交于
Prior to 2.6.18rc1 you could install with devices on a JMicron chipset using the "all-generic-ide" option. As of this kernel the AHCI driver grabs the controller and rams it into AHCI mode losing the PATA ports and making CD drives and the like vanish. The all-generic-ide option fails because the AHCI driver grabbed the PCI device and reconfigured it. To fix this three things are needed. #1 We must put the chip into dual function mode #2 The AHCI driver must grab only function 0 (already in your rc1 tree) #3 Something must grab the PATA ports The attached patch is the minimal risk edition of this. It puts the chip into dual function mode so that AHCI will grab the SATA ports without losing the PATA ports. To keep the risk as low as possible the third patch adds the PCI identifiers for the PATA port and the FN check to the ide-generic driver. There is a more featured jmicron driver on its way but that adds risk and the ide-generic support is sufficient to install and run a system. The actual chip setup done by the quirk is the precise setup recommended by the vendor. (The JMB368 appears only in the ide-generic entry as it has no AHCI so does not need the quirk) Signed-off-by: NAlan Cox <alan@redhat.com> Acked-by: NJeff Garzik <jgarzik@pobox.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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