- 15 1月, 2009 1 次提交
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由 Harvey Harrison 提交于
Add swab.h to kbuild.asm and remove the individual entries from each arch, mark as unifdef as some arches have some kernel-only bits inside. Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 08 1月, 2009 6 次提交
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由 Carl Love 提交于
This patch adds the SPU event based profiling funcitonality for the IBM Cell processor. Previously, the CELL OProfile kernel code supported PPU event, PPU cycle profiling and SPU cycle profiling. The addition of SPU event profiling allows the users to identify where in their SPU code various SPU evnets are occuring. This should help users further identify issues with their code. Note, SPU profiling has some limitations due to HW constraints. Only one event at a time can be used for profiling and SPU event profiling must be time sliced across all of the SPUs in a node. The patch adds a new arch specific file to the OProfile file system. The file has bit 0 set to indicate that the kernel supports SPU event profiling. The user tool must check this file/bit to make sure the kernel supports SPU event profiling before trying to do SPU event profiling. The user tool check is part of the user tool patch for SPU event profiling. Signed-off-by: NCarl Love <carll@us.ibm.com> Signed-off-by: NRobert Richter <robert.richter@amd.com>
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由 Anton Vorontsov 提交于
The patch replaces internal registers dump implementation with ppc_save_regs(). From now on PPC64 and PPC32 are using the same code for crash_setup_regs(). NOTE: The old regs dump implementation was capturing SP (r1) directly as is, so you could see crash_kexec() function on top of the back-trace. But ppc_save_regs() goes up one stack frame, so you'll not see it anymore, at the top-level you'll see who actually triggered the crash dump instead. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Geert Uytterhoeven 提交于
Update ps3vram driver to use the new ps3 three id modalias support. Signed-off-by: NGeert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Jim Paris 提交于
Add ps3vram driver, which exposes unused video RAM on the PS3 as a MTD device suitable for storage or swap. Fast data transfer is achieved using a local cache in system RAM and DMA transfers via the GPU. Signed-off-by: NVivien Chappelier <vivien.chappelier@free.fr> Signed-off-by: NJim Paris <jim@jtan.com> Acked-by: NGeoff Levand <geoffrey.levand@am.sony.com> Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Stephen Rothwell 提交于
So change the flags member of struct spu from u64 to unsigned long. This change will also prevent some warnings when we change u64 to unsigned long long. Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Matthias Fuchs 提交于
These ioctls take a struct serial_rs485 (see linux/serial.h) as argument. They are already available on x86. This patch adds them for the powerpc architecture. Signed-off-by: NMatthias Fuchs <mfuchs@ma-fu.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 07 1月, 2009 3 次提交
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由 Harvey Harrison 提交于
Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Matthew Wilcox 提交于
The atomic_t type cannot currently be used in some header files because it would create an include loop with asm/atomic.h. Move the type definition to linux/types.h to break the loop. Signed-off-by: NMatthew Wilcox <willy@linux.intel.com> Cc: Huang Ying <ying.huang@intel.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Mel Gorman 提交于
The KernelPageSize entry in /proc/pid/smaps is the pagesize used by the kernel to back a VMA. This matches the size used by the MMU in the majority of cases. However, one counter-example occurs on PPC64 kernels whereby a kernel using 64K as a base pagesize may still use 4K pages for the MMU on older processor. To distinguish, this patch reports MMUPageSize as the pagesize used by the MMU in /proc/pid/smaps. Signed-off-by: NMel Gorman <mel@csn.ul.ie> Cc: "KOSAKI Motohiro" <kosaki.motohiro@jp.fujitsu.com> Cc: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 01 1月, 2009 1 次提交
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由 Rusty Russell 提交于
Impact: New API The old topology_core_siblings() and topology_thread_siblings() return a cpumask_t; these new ones return a (const) struct cpumask *. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Signed-off-by: NMike Travis <travis@sgi.com>
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- 31 12月, 2008 18 次提交
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由 Hollis Blanchard 提交于
The only significant changes were to kvmppc_exit_timing_write() and kvmppc_exit_timing_show(), both of which were dramatically simplified. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Existing KVM statistics are either just counters (kvm_stat) reported for KVM generally or trace based aproaches like kvm_trace. For KVM on powerpc we had the need to track the timings of the different exit types. While this could be achieved parsing data created with a kvm_trace extension this adds too much overhead (at least on embedded PowerPC) slowing down the workloads we wanted to measure. Therefore this patch adds a in-kernel exit timing statistic to the powerpc kvm code. These statistic is available per vm&vcpu under the kvm debugfs directory. As this statistic is low, but still some overhead it can be enabled via a .config entry and should be off by default. Since this patch touched all powerpc kvm_stat code anyway this code is now merged and simplified together with the exit timing statistic code (still working with exit timing disabled in .config). Signed-off-by: NChristian Ehrhardt <ehrhardt@linux.vnet.ibm.com> Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Store shadow TLB entries in memory, but only use it on host context switch (instead of every guest entry). This improves performance for most workloads on 440 by reducing the guest TLB miss rate. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Formerly, we used to maintain a per-vcpu shadow TLB and on every entry to the guest would load this array into the hardware TLB. This consumed 1280 bytes of memory (64 entries of 16 bytes plus a struct page pointer each), and also required some assembly to loop over the array on every entry. Instead of saving a copy in memory, we can just store shadow mappings directly into the hardware TLB, accepting that the host kernel will clobber these as part of the normal 440 TLB round robin. When we do that we need less than half the memory, and we have decreased the exit handling time for all guest exits, at the cost of increased number of TLB misses because the host overwrites some guest entries. These savings will be increased on processors with larger TLBs or which implement intelligent flush instructions like tlbivax (which will avoid the need to walk arrays in software). In addition to that and to the code simplification, we have a greater chance of leaving other host userspace mappings in the TLB, instead of forcing all subsequent tasks to re-fault all their mappings. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
KVM currently ignores the host's round robin TLB eviction selection, instead maintaining its own TLB state and its own round robin index. However, by participating in the normal 44x TLB selection, we can drop the alternate TLB processing in KVM. This results in a significant performance improvement, since that processing currently must be done on *every* guest exit. Accordingly, KVM needs to be able to access and increment tlb_44x_index. (KVM on 440 cannot be a module, so there is no need to export this symbol.) Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
KVM on 440 has always been able to handle large guest mappings with 4K host pages -- we must, since the guest kernel uses 256MB mappings. This patch makes KVM work when the host has large pages too (tested with 64K). Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
We used to defer invalidating userspace TLB entries until jumping out of the kernel. This was causing MMU weirdness most easily triggered by using a pipe in the guest, e.g. "dmesg | tail". I believe the problem was that after the guest kernel changed the PID (part of context switch), the old process's mappings were still present, and so copy_to_user() on the "return to new process" path ended up using stale mappings. Testing with large pages (64K) exposed the problem, probably because with 4K pages, pressure on the TLB faulted all process A's mappings out before the guest kernel could insert any for process B. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
In kvmppc_deliver_interrupt is just one case left in the switch and it is a rare one (less than 8%) when looking at the exit numbers. Therefore we can at least drop the switch/case and if an if. I inserted an unlikely too, but that's open for discussion. In kvmppc_can_deliver_interrupt all frequent cases are in the default case. I know compilers are smart but we can make it easier for them. By writing down all options and removing the default case combined with the fact that ithe values are constants 0..15 should allow the compiler to write an easy jump table. Modifying kvmppc_can_deliver_interrupt pointed me to the fact that gcc seems to be unable to reduce priority_exception[x] to a build time constant. Therefore I changed the usage of the translation arrays in the interrupt delivery path completely. It is now using priority without translation to irq on the full irq delivery path. To be able to do that ivpr regs are stored by their priority now. Additionally the decision made in kvmppc_can_deliver_interrupt is already sufficient to get the value of interrupt_msr_mask[x]. Therefore we can replace the 16x4byte array used here with a single 4byte variable (might still be one miss, but the chance to find this in cache should be better than the right entry of the whole array). Signed-off-by: NChristian Ehrhardt <ehrhardt@linux.vnet.ibm.com> Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
However, some of these fields could be split into separate per-core structures in the future. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
This patch doesn't yet move all 44x-specific data into the new structure, but is the first step down that path. In the future we may also want to create a struct kvm_vcpu_booke. Based on patch from Liu Yu <yu.liu@freescale.com>. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Needed to port to other Book E processors. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
Cores provide 3 emulation hooks, implemented for example in the new 4xx_emulate.c: kvmppc_core_emulate_op kvmppc_core_emulate_mtspr kvmppc_core_emulate_mfspr Strictly speaking the last two aren't necessary, but provide for more informative error reporting ("unknown SPR"). Long term I'd like to have instruction decoding autogenerated from tables of opcodes, and that way we could aggregate universal, Book E, and core-specific instructions more easily and without redundant switch statements. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
This is used in a couple places in KVM, but isn't KVM-specific. However, this patch doesn't modify other in-kernel emulation code: - xmon uses a direct copy of ppc_opc.c from binutils - emulate_instruction() doesn't need it because it can use a series of mask tests. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Acked-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
This introduces a set of core-provided hooks. For 440, some of these are implemented by booke.c, with the rest in (the new) 44x.c. Note that these hooks are link-time, not run-time. Since it is not possible to build a single kernel for both e500 and 440 (for example), using function pointers would only add overhead. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
This will ease ports to other cores. Also remove unused "struct kvm_tlb" while we're at it. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Hollis Blanchard 提交于
This will make it easier to provide implementations for other cores. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Anton Vorontsov 提交于
Some 83xx boards were not ready for the optional QUICC Engine support. This patch fixes following build errors: arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb308): undefined reference to `par_io_data_set' arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb334): undefined reference to `par_io_data_set' arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb408): undefined reference to `qe_ic_get_high_irq' arch/powerpc/platforms/built-in.o: In function `flush_disable_caches': (.text+0xb478): undefined reference to `qe_ic_get_low_irq' arch/powerpc/platforms/built-in.o: In function `mpc832x_spi_init': mpc832x_rdb.c:(.init.text+0x574c): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x5768): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x5784): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x57a0): undefined reference to `par_io_config_pin' mpc832x_rdb.c:(.init.text+0x57bc): undefined reference to `par_io_config_pin' arch/powerpc/platforms/built-in.o:mpc832x_rdb.c:(.init.text+0x57d8): more undefined references to `par_io_config_pin' follow arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_init_IRQ': mpc836x_rdk.c:(.init.text+0x5e84): undefined reference to `qe_ic_init' arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_setup_arch': mpc836x_rdk.c:(.init.text+0x5f10): undefined reference to `qe_reset' make: *** [.tmp_vmlinux1] Error 1 Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Anton Vorontsov 提交于
With this API we're able to set a QE pin to the GPIO mode or a dedicated peripheral function. The API relies on the fact that QE gpio controllers are registered. If they aren't, the API won't work (gracefully though). There is one caveat though: if anybody occupied the node->data before us, or overwrote it, then bad things will happen. Luckily this is all in the platform code that we fully control, so this should never happen. I could implement more checks (for example we could create a list of successfully registered QE controllers, and compare the node->data in the qe_pin_request()), but this is unneeded if nobody is going to do silly things behind our back. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 29 12月, 2008 1 次提交
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由 Ilya Yanok 提交于
This adds support for 16k and 64k page sizes on PowerPC 44x processors. The PGDIR table is much smaller than a page when using 16k or 64k pages (512 and 32 bytes respectively) so we allocate the PGDIR with kzalloc() instead of __get_free_pages(). One PTE table covers rather a large memory area when using 16k or 64k pages (32MB or 512MB respectively), so we can easily put FIXMAP and PKMAP in the area covered by one PTE table. Signed-off-by: NYuri Tikhonov <yur@emcraft.com> Signed-off-by: NVladimir Panfilov <pvr@emcraft.com> Signed-off-by: NIlya Yanok <yanok@emcraft.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 26 12月, 2008 1 次提交
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由 Rusty Russell 提交于
Impact: New APIs The old node_to_cpumask/node_to_pcibus returned a cpumask_t: these return a pointer to a struct cpumask. Part of removing cpumasks from the stack. (Also replaces powerpc internal uses of node_to_cpumask). Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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- 25 12月, 2008 1 次提交
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由 Martin Schwidefsky 提交于
arch_setup_additional_pages currently gets two arguments, the binary format descripton and an indication if the process uses an executable stack or not. The second argument is not used by anybody, it could be removed without replacement. What actually does make sense is to pass an indication if the process uses the elf interpreter or not. The glibc code will not use anything from the vdso if the process does not use the dynamic linker, so for statically linked binaries the architecture backend can choose not to map the vdso. Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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- 23 12月, 2008 4 次提交
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由 Dale Farnsworth 提交于
Wire up the trampoline code for ppc32 to relay exceptions from the vectors at address 0 to vectors at address 32MB, and modify Kconfig to enable Kdump support for all classic powerpcs. Signed-off-by: NDale Farnsworth <dale@farnsworth.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Dale Farnsworth 提交于
Add the ability for a classic ppc kernel to be loaded at an address of 32MB. This done by fixing a few places that assume we are loaded at address 0, and by changing several uses of KERNELBASE to use PAGE_OFFSET, instead. Signed-off-by: NDale Farnsworth <dale@farnsworth.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Anton Vorontsov 提交于
This replaces the dummy crash_setup_regs function with full-fledged crash_setup_regs implementation. On PPC32 we simply use the new ppc_save_regs function to dump the registers. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Anton Vorontsov 提交于
Today the arch/powerpc/xmon/setjmp.S file contains only the xmon_save_regs function. We want to use it for kdump purposes, so let's move the file into arch/powerpc/kernel/ and give the function a more generic name (ppc_save_regs). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 21 12月, 2008 4 次提交
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由 Wolfram Sang 提交于
Add RTS/CTS-support for the PSC of the MPC5200B. Tested with a Phytec MPC5200B-IO. Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
This patch adds documentation to the mpc5200 interrupt controller driver and cleans up some minor coding conventions. It also moves the contents of mpc52xx_pic.h into the driver proper (except for a small common bit that is moved to the common mpc52xx.h) because the information encoded there is not required by any other part of kernel code. Finally for code readability sake, the L2_OFFSET shift value is removed because the code using it resolves to a noop. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Erickson 提交于
Add const qualifier to device_node argument for dcr_resource_{start,len} as of_get_property also const-qualifies this argument. Signed-off-by: NGrant Erickson <gerickson@nuovations.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Benjamin Herrenschmidt 提交于
Currently, we never set _PAGE_COHERENT in the PTEs, we just OR it in in the hash code based on some CPU feature bit. We also manipulate _PAGE_NO_CACHE and _PAGE_GUARDED by hand in all sorts of places. This changes the logic so that instead, the PTE now contains _PAGE_COHERENT for all normal RAM pages thay have I = 0 on platforms that need it. The hash code clears it if the feature bit is not set. It also adds some clean accessors to setup various valid combinations of access flags and change various bits of code to use them instead. This should help having the PTE actually containing the bit combinations that we really want. I also removed _PAGE_GUARDED from _PAGE_BASE on 44x and instead set it explicitely from the TLB miss. I will ultimately remove it completely as it appears that it might not be needed after all but in the meantime, having it in the TLB miss makes things a lot easier. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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