- 10 10月, 2008 7 次提交
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由 Michael Chan 提交于
This logic is used in bnx2_close() and bnx2_suspend() and so should be separated out into a separate function. Signed-off-by: NMichael Chan <mchan@broadcom.com> Signed-off-by: NBenjamin Li <benli@broadcom.com> Signed-off-by: NMatt Carlson <mcarlson@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Herbert Xu 提交于
This patch makes the RX/TX byte counters for IPIP, GRE and SIT more consistent. Previously we included the external IP headers on the way out but not when the packet is inbound. The new scheme is to count payload only in both directions. For IPIP and SIT this simply means the exclusion of the external IP header. For GRE this means that we exclude the GRE header as well. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Herbert Xu 提交于
This patch adds support for Ethernet over GRE encapsulation. This is exposed to user-space with a new link type of "gretap" instead of "gre". It will create an ARPHRD_ETHER device in lieu of the usual ARPHRD_IPGRE. Note that to preserver backwards compatibility all Transparent Ethernet Bridging packets are passed to an ARPHRD_IPGRE tunnel if its key matches and there is no ARPHRD_ETHER device whose key matches more closely. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Herbert Xu 提交于
This patch adds a netlink interface that will eventually displace the existing ioctl interface. It utilises the elegant rtnl_link_ops mechanism. This also means that user-space no longer needs to rely on the tunnel interface being of type GRE to identify GRE tunnels. The identification can now occur using rtnl_link_ops. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Herbert Xu 提交于
This patch moves the dev->mtu setting out of ipgre_tunnel_bind_dev. This is in prepartion of using rtnl_link where we'll need to make the MTU setting conditional on whether the user has supplied an MTU. This also requires the move of the ipgre_tunnel_bind_dev call out of the dev->init function so that we can access the user parameters later. This patch also adds a check to prevent setting the MTU below the minimum of 68. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Herbert Xu 提交于
Now that we have dev->needed_headroom, we can use it instead of having a bogus dev->hard_header_len. This also allows us to include dev->hard_header_len in the MTU computation so that when we do have a meaningful hard_harder_len in future it is included automatically in figuring out the MTU. Incidentally, this fixes a bug where we ignored the needed_headroom field of the underlying device in calculating our own hard_header_len. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
1. arch/powerpc/platforms/pasemi/gpio_mdio.c also needs to be converted over to mdiobus_{alloc,free}(). 2. drivers/net/phy/fixed.c used to embed a struct mii_bus into its struct fixed_mdio_bus and then use container_of() to go from the former to the latter. Since mii bus structures are no longer embedded, we need to do something like use the mii bus private pointer to go from mii_bus to fixed_mdio_bus instead. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 10月, 2008 33 次提交
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由 David S. Miller 提交于
drivers/net/jme.c:1598: warning: ‘jme_set_100m_half’ defined but not used drivers/net/jme.c:1618: warning: ‘jme_wait_link’ defined but not used Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Guo-Fu Tseng 提交于
Advances the driver version after modification. Signed-off-by: NGuo-Fu Tseng <cooldavid@cooldavid.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 akeemting 提交于
Fix IRQ handle bug when interrupt mode. The driver was incorrectly handled and returned IRQ_HANDLED while the device is not generating the interrupt. It happened due to faulty determination of interrupt status register. Found by: "Ethan" <ethanhsiao@jmicron.com> Fixed by: "akeemting" <akeem@jmicron.com> Signed-off-by: NGuo-Fu Tseng <cooldavid@cooldavid.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Guo-Fu Tseng 提交于
1. Set bit 5 of GPREG1 to 1 to enable hardware workaround for half-duplex mode. Which the MAC processor generates CRS/COL by itself instead of receive it from PHY processor. 2. Set bit 6 of GPREG1 to 1 to enable hardware workaround that masks the MAC processor working right while calculating IPv6 RSS in 10/100 mode. 3. Group the workaround codes all together. Signed-off-by: NGuo-Fu Tseng <cooldavid@cooldavid.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
Add support for 1G optical Vitesse PHY. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
Add support for SR PHY. Auto-detect phy module type, and report type changes. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
Add generic code to manage interrupt driven PHYs. Do not reset the phy after link parameters update, the new values might get lost. Return early from link change notification when the link parameters remain unchanged. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
Do not require PHY interrupts to be connected to GPIs in ascending order. Base interrupt availability both on PHYs supporting them and on GPIs being hooked up. Allows boards to specify interrupt GPIs though the PHYs don't use them. Remove spurious PHY interrupts due to clearing T3DBG interrupts before setting their polarity. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
Second step in overall phy layer reorganization. Clean up the port_type_info structure. Support coextistence of clause 22 and clause 45 MDIO devices. Select the type of MDIO transaction on a per transaction basis. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
First step towards overall PHY layering re-organization. Allow a status return when a PHY is reset. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
Allocate a queue set per core, up to the maximum of available qsets. Share the queue sets on multi port adapters. Rename MSI-X interrupt vectors ethX-N, N being the queue set number. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Divy Le Ray 提交于
when a fatal error occurs, bring ports down, reset the chip, and bring ports back up. Factorize code used for both EEH and fatal error recovery. Fix timer usage when bringing up/resetting sge queue sets. Signed-off-by: NDivy Le Ray <divy@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
Add support for the Marvell 88E6060 switch chip. This chip only supports the Header and Trailer tagging formats, and we use it in Trailer mode since that mode is slightly easier to handle than Header mode. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NByron Bradley <byron.bbradley@gmail.com> Tested-by: NTim Ellis <tim.ellis@mac.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
This adds support for the Trailer switch tagging format. This is another tagging that doesn't explicitly mark tagged packets with a distinct ethertype, so that we need to add a similar hack in the receive path as for the Original DSA tagging format. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NByron Bradley <byron.bbradley@gmail.com> Tested-by: NTim Ellis <tim.ellis@mac.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
Add support for the Marvell 88E6131 switch chip. This chip only supports the original (ethertype-less) DSA tagging format. On the 88E6131, there is a PHY Polling Unit (PPU) which has exclusive access to each of the PHYs's MII management registers. If we want to talk to the PHYs from software, we have to disable the PPU and wait for it to complete its current transaction before we can do so, and we need to re-enable the PPU afterwards to make sure that the switch will notice changes in link state and speed on the individual ports as they occur. Since disabling the PPU is rather slow, and since MII management accesses are typically done in bursts, this patch keeps the PPU disabled for 10ms after a software access completes. This makes handling the PPU slightly more complex, but speeds up something like running ethtool on one of the switch slave interfaces from ~300ms to ~30ms on typical hardware. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
Most of the DSA switches currently in the field do not support the Ethertype DSA tagging format that one of the previous patches added support for, but only the original DSA tagging format. The original DSA tagging format carries the same information as the Ethertype DSA tagging format, but with the difference that it does not have an ethertype field. In other words, when receiving a packet that is tagged with an original DSA tag, there is no way of telling in eth_type_trans() that this packet is in fact a DSA-tagged packet. This patch adds a hook into eth_type_trans() which is only compiled in if support for a switch chip that doesn't support Ethertype DSA is selected, and which checks whether there is a DSA switch driver instance attached to this network device which uses the old tag format. If so, it sets the protocol field to ETH_P_DSA without looking at the packet, so that the packet ends up in the right place. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
Distributed Switch Architecture is a protocol for managing hardware switch chips. It consists of a set of MII management registers and commands to configure the switch, and an ethernet header format to signal which of the ports of the switch a packet was received from or is intended to be sent to. The switches that this driver supports are typically embedded in access points and routers, and a typical setup with a DSA switch looks something like this: +-----------+ +-----------+ | | RGMII | | | +-------+ +------ 1000baseT MDI ("WAN") | | | 6-port +------ 1000baseT MDI ("LAN1") | CPU | | ethernet +------ 1000baseT MDI ("LAN2") | |MIImgmt| switch +------ 1000baseT MDI ("LAN3") | +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4") | | | | +-----------+ +-----------+ The switch driver presents each port on the switch as a separate network interface to Linux, polls the switch to maintain software link state of those ports, forwards MII management interface accesses to those network interfaces (e.g. as done by ethtool) to the switch, and exposes the switch's hardware statistics counters via the appropriate Linux kernel interfaces. This initial patch supports the MII management interface register layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and supports the "Ethertype DSA" packet tagging format. (There is no officially registered ethertype for the Ethertype DSA packet format, so we just grab a random one. The ethertype to use is programmed into the switch, and the switch driver uses the value of ETH_P_EDSA for this, so this define can be changed at any time in the future if the one we chose is allocated to another protocol or if Ethertype DSA gets its own officially registered ethertype, and everything will continue to work.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Tested-by: NNicolas Pitre <nico@marvell.com> Tested-by: NByron Bradley <byron.bbradley@gmail.com> Tested-by: NTim Ellis <tim.ellis@mac.com> Tested-by: NPeter van Valderen <linux@ddcrew.com> Tested-by: NDirk Teurlings <dirk@upexia.nl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andreas Oberritter 提交于
The write barrier should be used before starting a DMA transfer. This fixes a problem, where almost all packets received on another machine had garbled content. Tested with an RTL8100C on a MIPS machine. Signed-off-by: NAndreas Oberritter <obi@linuxtv.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Arjan van de Ven 提交于
there's several drivers that have use "tx_timeout" for the .. tx timeout function. All fine with that, they're static, however for doing stats on how often which driver hits the timeout it's a tad unfortunate. The patch below gives the ones I found in the kerneloops.org database unique names. Signed-off-by: NArjan van de Ven <arjan@linux.intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David Brownell 提交于
When building with CONFIG_USB_DEBUG, don't create logspam from the USB networking drivers. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruno Prémont 提交于
Since recent kernel (2.6.26 or 2.6.27) the PCI wakeup functions are influenced by generic device ability and configuration when enabling PCI-device triggered wake-up. This patch causes WoL setting to enable/disable device's wish to be permitted to wake-up the host when changing WoL options and also during device probing. Without this patch one has write 'enabled' to /sys/bus/pci/devices/0000:02:08.0/power/wakeup Signed-off-by: NBruno Prémont <bonbons@linux-vserver.org> Acked-by: NRafael J. Wysocki <rjw@sisk.pl> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Bruno Prémont 提交于
When probing the chip and handling it's power management settings also remember wether WoL feature is enabled. Without this patch one has to call ethtool to change WoL settings for this flag to be set and any WoL being enabled on suspend to RAM. Signed-off-by: NBruno Prémont <bonbons@linux-vserver.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Trent Piepho 提交于
The device's carrier status is controlled via the functions netif_carrier_on() and netif_carrier_off(). These set or clear a bit indicating the carrier (aka lower level link) is down, and if the state changed, they fire off a routing netlink event. Add a call to netif_carrier_off() before register_netdev() so that the newly created device will be set to carrier down. Then when the carrier comes up for the first time, a netlink event will be generated, as the carrier changed from down to up. Otherwise the initial carrier up will appear to be changing the status from up to up, and so no event is generated since that's not a change. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
mv643xx_eth uses ip_hdr() (defined in linux/ip.h), but relied on another header file to include the needed header file indirectly. In latest net-next this indirect include chain is gone, so the driver fails to build. Include linux/ip.h explicitly to fix this. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jarek Poplawski 提交于
This lockdep warning: ================================= [ INFO: inconsistent lock state ] 2.6.27-rc7 #3 --------------------------------- inconsistent {in-softirq-W} -> {softirq-on-W} usage. syslogd/2474 [HC0[0]:SC0[0]:HE1:SE1] takes: (_xmit_ETHER#2){-+..}, at: [<c0265562>] netpoll_send_skb+0x132/0x190 ... is caused by unconditional local_irq_disable()/local_irq_enable() in disable_irq_lockdep()/enable_irq_lockdep() used by __ei_poll(). Since netconsole/netpoll always calls dev->poll_controller() with local irqs disabled, disable_irq()/enable_irq() instead is safe and enough (like e.g. in 3c509 or 8139xx drivers). Reported-and-tested-by: NBernard Pidoux F6BVP <f6bvp@free.fr> Signed-off-by: NJarek Poplawski <jarkao2@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Brandeburg, Jesse 提交于
It was pointed out by Breno Leitao <leitao@linux.vnet.ibm.com> that ixgb would crash on PPC when an IOMMU was in use, if change_mtu was called. It appears to be a pretty simple issue in the driver that wasn't discovered because most systems don't run with an IOMMU. The driver needs to only unmap buffers that are mapped (duh). CC: Breno Leitao <leitao@linux.vnet.ibm.com> Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Arthur Jones 提交于
Since e1000e has been existance in linux-2.6, we've never released the hardware semaphore after a successful write to the SPI EEPROM. I guess we don't write to SPI EEPROM much -- but those few of us that do appreciate it when we can later read from the EEPROM without having to reboot. Found-by: NNick Van Fossen <Nick.VanFossen@riverbed.com> Signed-off-by: NArthur Jones <ajones@riverbed.com> Reviewed-by: NAuke Kok <auke-jan.h.kok@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Steve Glendinning 提交于
Attached is a driver for SMSC's LAN9500 USB2.0 10/100 ethernet adapter. Signed-off-by: NSteve Glendinning <steve.glendinning@smsc.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
Add mdiobus_{read,write} routines to allow direct reading/writing of registers on an mii bus without having to go through the PHY abstraction, and make phy_{read,write} use these primitives. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
Introduce the mdio_bus class, and give each 'struct mii_bus' its own 'struct device', so that mii_bus objects are represented in the device tree and can be found by querying the device tree. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lennert Buytenhek 提交于
This patch introduces mdiobus_alloc() and mdiobus_free(), and makes all mdio bus drivers use these functions to allocate their struct mii_bus'es dynamically. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net> Acked-by: NAndy Fleming <afleming@freescale.com>
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由 Lennert Buytenhek 提交于
In preparation of giving mii_bus objects a device tree presence of their own, rename struct mii_bus's ->dev argument to ->parent, since having a 'struct device *dev' that points to our parent device conflicts with introducing a 'struct device dev' representing our own device. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net> Acked-by: NAndy Fleming <afleming@freescale.com>
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