Move the hardware PMD and PTE page table definitions from pgtable.h
into pgtable-hwdef.h, and include pgtable-hwdef.h as necessary.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Read the processor ID at boot, and save it in "processor_id" as we
did before.  Later, when we re-parse the CPU type in the setup.c code,
re-use the value stored in "processor_id".

This allows a cleaner work-around for noMMU devices without CP#15.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The sys_fork is not supported in nommu mode. The other syscalls
that is not supported in nommu mode are to be defined as cond_signal
in kernel/sys_ni.c.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

    
Put in a blank line between CPU entries in /proc/cpuinfo, just like
most other architectures (i386, ia64, x86_64) do.
Signed-off-by: NMartin Michlmayr <tbm@cyrius.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

---

    
This patch adjusts the offset argument passed into sys_mmap2 to be
always shifted 12, even when the native page size isn't 4K.  This is
what all existing userspace libraries expect.
Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

---

    
The TX49XX has the prefetch instruction.  It supports only Pref_Load
(hint 0).  Actually changes in this patch except for Kconfig are not
have any effects, I added these changes to prevent misuse of unsupported
hints.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

    
Basically identical to c-r4k.c, so maintaining one is really enough.
Signed-off-by: NThiemo Seufer <ths@networkno.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

    
Dump all the ridiculously complicated stuff that was needed support
compilers older and newer than 3.0.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NThiemo Seufer <ths@networkno.de>

    
Mention the Broadcom part number for the BigSur board (BCM91480B)
in Kconfig, just like it's done for other Broadcom boards.
Signed-off-by: NMartin Michlmayr <tbm@cyrius.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

    
This option is no longer usable with supported compilers.  It will be
replaced by usage of -msym32 in a separate patch.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

    
Move function prototypes to asm/signal.h to detect trivial errors and
add some __user tags to get rid of sparse warnings.  Generated code
should not be changed.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NMartin Michlmayr <tbm@cyrius.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

    
SMP bits needed to builds and run an SMP kernel.  While only a single
processor is supported ATM it's still useful for some SMP debugging using
Qemu.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

    
Use blast_scache_range, blast_inv_scache_range for rm7k scache routine.
Output code should be logically same.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NPeter Horton <pdh@colonel-panic.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The AES setkey routine writes 64 bytes to the E_KEY area even though
there are only 60 bytes there.  It is in fact safe since E_KEY is
immediately follwed by D_KEY which is initialised afterwards.  However,
doing this may trigger undefined behaviour and makes Coverity unhappy.

So by combining E_KEY and D_KEY into one array we sidestep this issue
altogether.

This problem was reported by Adrian Bunk.
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

ALCHEMY:  Add OHCI support for AU1200

Updated by moving the OHCI support out of the EHCI patch.
Signed-off-by: NJordan Crouse <jordan.crouse@amd.com>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

ALCHEMY:  Add EHCI support for AU1200

Updated by removing the OHCI support
Signed-off-by: NJordan Crouse <jordan.crouse@amd.com>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch adds the ability to mark symbols that will be changed in the
future, so that kernel modules that don't include MODULE_LICENSE("GPL")
and use the symbols, will be flagged and printed out to the system log.
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

platform_get_irq*() now returns on -ENXIO when the resource cannot be
found.  Ensure all users of platform_get_irq*() handle this error
appropriately.
Signed-off-by: NDavid Vrabel <dvrabel@arcom.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The i386 defconfig wasn't updated for ages.

Instead of running "make oldconfig" on the old defconfig and trying to
give reasonable answers at all new options, this patch replaces it with
the one I'm using in 2.6.16-rc1.

This way, it's a .config that is confirmed to work on at least one
computer in the world.  ;-)
Signed-off-by: NAdrian Bunk <bunk@stusta.de>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

1) huge_pte_offset() did not check the page table hierarchy
   elements as being empty correctly, resulting in an OOPS

2) Need platform specific hugetlb_get_unmapped_area() to handle
   the top-down vs. bottom-up address space allocation strategies.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

init/do_mounts_rd.c depends upon CONFIG_BLK_DEV_RAM, not CONFIG_BLK_DEV_INITRD.
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We only need to write an invalid tag every 16 bytes,
so taking advantage of this can save many instructions
compared to the simple memset() call we make now.

A prefetching implementation is implemented for sun4u
and a block-init store version if implemented for Niagara.

The next trick is to be able to perform an init and
a copy_tsb() in parallel when growing a TSB table.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

online_page() is straightforward, and then add a dummy
remove_memory() that returns -EINVAL just like i386.

There is no point in implementing remove_memory() since
__remove_pages() has no implementation either.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Try only lightly on > 1 order allocations.

If a grow fails, we are under memory pressure, so do not try
to grow the TSB for this address space any more.

If a > 0 order TSB allocation fails on a new fork, retry using
a 0 order allocation.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Put it one page below the top of the 32-bit address space.
This gives us ~16MB more address space to work with.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Currently allocations are very constrained for 32-bit processes.
It grows down-up from 0x70000000 to 0xf0000000 which gives about
2GB of stack + dynamic mmap() space.

So support the top-down method, and we need to override the
generic helper function in order to deal with D-cache coloring.

With these changes I was able to squeeze out a mmap() just over
3.6GB in size in a 32-bit process.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This is good for up to %50 performance improvement of some test cases.
The problem has been the race conditions, and hopefully I've plugged
them all up here.

1) There was a serious race in switch_mm() wrt. lazy TLB
   switching to and from kernel threads.

   We could erroneously skip a tsb_context_switch() and thus
   use a stale TSB across a TSB grow event.

   There is a big comment now in that function describing
   exactly how it can happen.

2) All code paths that do something with the TSB need to be
   guarded with the mm->context.lock spinlock.  This makes
   page table flushing paths properly synchronize with both
   TSB growing and TLB context changes.

3) TSB growing events are moved to the end of successful fault
   processing.  Previously it was in update_mmu_cache() but
   that is deadlock prone.  At the end of do_sparc64_fault()
   we hold no spinlocks that could deadlock the TSB grow
   sequence.  We also have dropped the address space semaphore.

While we're here, add prefetching to the copy_tsb() routine
and put it in assembler into the tsb.S file.  This piece of
code is quite time critical.

There are some small negative side effects to this code which
can be improved upon.  In particular we grab the mm->context.lock
even for the tsb insert done by update_mmu_cache() now and that's
a bit excessive.  We can get rid of that locking, and the same
lock taking in flush_tsb_user(), by disabling PSTATE_IE around
the whole operation including the capturing of the tsb pointer
and tsb_nentries value.  That would work because anyone growing
the TSB won't free up the old TSB until all cpus respond to the
TSB change cross call.

I'm not quite so confident in that optimization to put it in
right now, but eventually we might be able to and the description
is here for reference.

This code seems very solid now.  It passes several parallel GCC
bootstrap builds, and our favorite "nut cruncher" stress test which is
a full "make -j8192" build of a "make allmodconfig" kernel.  That puts
about 256 processes on each cpu's run queue, makes lots of process cpu
migrations occur, causes lots of page table and TLB flushing activity,
incurs many context version number changes, and it swaps the machine
real far out to disk even though there is 16GB of ram on this test
system. :-)
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Niagara does not implement some of the VIS instructions in
hardware, so we have to emulate them.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Report 'sun4v' when appropriate in /proc/cpuinfo

Remove all the verifications of the OBP version string.  Just
make sure it's there, and report it raw in the bootup logs and
via /proc/cpuinfo.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The mapping is a simple "(cpuid >> 2) == core" for now.
Later we'll add more sophisticated code that will walk
the sun4v machine description and figure this out from
there.

We should also add core mappings for jaguar and panther
processors.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>