- 30 11月, 2012 1 次提交
-
-
由 Olof Johansson 提交于
Fix 32 vs 32k typo: arch/arm/mach-omap2/timer.c: In function 'omap4_local_timer_init': arch/arm/mach-omap2/timer.c:633:2: error: implicit declaration of function 'omap4_sync32_timer_init' [-Werror=implicit-function-declaration] arch/arm/mach-omap2/timer.c: At top level: arch/arm/mach-omap2/timer.c:610:2: warning: 'omap4_sync32k_timer_init' defined but not used [-Wunused-function] Also, mark the omap4_local_timer_init() stub as __init (and take off the explicit inline and let the compiler do the work instead). Signed-off-by: NOlof Johansson <olof@lixom.net> Cc: Tony Lindgren <tony@atomide.com> Cc: Igor Grinberg <grinberg@compulab.co.il>
-
- 22 11月, 2012 4 次提交
-
-
由 Igor Grinberg 提交于
Commit 97ee9f01 (ARM: OMAP: fix the ads7846 init code) have enabled the pendown GPIO debounce time setting by the below sequence: gpio_request_one() gpio_set_debounce() gpio_free() It also revealed a bug in the OMAP GPIO handling code which prevented the GPIO debounce clock to be disabled and CORE transition to low power states. Commit c9c55d92 (gpio/omap: fix off-mode bug: clear debounce settings on free/reset) fixes the OMAP GPIO handling code by making sure that the GPIO debounce clock gets disabled if no GPIO is requested from current bank. While fixing the OMAP GPIO handling code (in the right way), the above commit makes the gpio_request->set_debounce->free sequence invalid as after freeing the GPIO, the debounce settings are lost. Fix the debounce settings by moving the debounce initialization to the actual GPIO requesting code - the ads7846 driver. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
-
由 Jason Gunthorpe 提交于
The kirkwood_pcie_scan_bus function duplicates the common code in bios32.c, passing ops in will use the common code.. Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
-
由 Igor Grinberg 提交于
cm-t3517 starting from revision 1.2 does not have the 32K oscilator wired to the AM3517 SoC. Therefore switch to use the GPTIMER for system clock. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Igor Grinberg 提交于
CONFIG_OMAP_32K_TIMER is kind of standing on the single zImage way. Make OMAP2+ timer code independant from the CONFIG_OMAP_32K_TIMER setting. To remove the dependancy, several conversions/additions had to be done: 1) Timer initialization functions are named by the platform name and the clock source in use. This also makes it possible to define and use the GPTIMER as the clock source instead of the 32K timer on platforms that do not have the 32K timer ip block or the 32K timer is not wired on the board. Currently, the the timer is chosen in the machine_desc structure on per board basis. Later, DT should be used to choose the timer. 2) Settings under the CONFIG_OMAP_32K_TIMER option are used as defaults and those under !CONFIG_OMAP_32K_TIMER are removed. This removes the CONFIG_OMAP_32K_TIMER on OMAP2+ timer code. 3) Since we have all the timers defined inside machine_desc structure and we no longer need the fallback to gp_timer clock source in case 32k_timer clock source is unavailable (namely on AM33xx), we no longer need the #ifdef around omap2_sync32k_clocksource_init() function. Remove the #ifdef CONFIG_OMAP_32K_TIMER around the omap2_sync32k_clocksource_init() function. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Cc: Jon Hunter <jon-hunter@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com>
-
- 20 11月, 2012 4 次提交
-
-
由 Eunki Kim 提交于
This patch uses devm_* functions for probe function in ADC driver. It reduces code size and simplifies the code. Signed-off-by: NEunki Kim <eunki_kim@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
-
由 Daniel Kurtz 提交于
chained_irq_enter/exit() already mask&ack/unmask the chained interrupt. There is no need to also explicitly do it in the handler. Signed-off-by: NDaniel Kurtz <djkurtz@chromium.org> Acked-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
-
Commit 82145130 ("ARM: EXYNOS: fix address for EXYNOS4 MDMA1") changed EXYNOS specific setup of PL330 DMA engine to use 'non-secure' mdma1 address instead of 'secure' one (from 0x12840000 to 0x12850000) to fix issue with some Exynos4212 SOCs. Unfortunately it brakes PL330 setup for revision 0 of Exynos4210 SOC (mdma1 device cannot be found at 'non-secure' address): [ 0.566245] dma-pl330 dma-pl330.2: PERIPH_ID 0x0, PCELL_ID 0x0 ! [ 0.566278] dma-pl330: probe of dma-pl330.2 failed with error -22 Fix it by using 'secure' mdma1 address on Exynos4210 revision 0 SOC. Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
-
由 Alexander Varnin 提交于
Actually, SPI channel 0 on 2443 is mapped to HS SPI controller, and to enable s3c2410-spi controller, we should power on channel 1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its clock. Signed-off-by: NAlexander Varnin <fenixk19@mail.ru> Reviewed-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
-
- 19 11月, 2012 6 次提交
-
-
由 Lad, Prabhakar 提交于
Fix the video clock setting when custom timings are used with pclock <= 27MHz. Existing video clock selection uses PLL2 mode which results in a 54MHz clock whereas using the MXI mode results in a 27MHz clock (which is the one actually desired). This bug affects the Enhanced Definition (ED) support on DM644x. Without this patch, out-range signals errors are were observed on the TV when viewing ED. An out-of-range signal is often caused when the field rate is above the rate that the television will handle. Signed-off-by: NLad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com> Cc: Sekhar Nori <nsekhar@ti.com> [nsekhar@ti.com: reword commit message based on on-list discussion] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
-
由 Thomas Abraham 提交于
All EXYNOS5 based platforms support only device tree based boot and so the unused non-dt code that sets i2c0 resource information and device names for sdhci and i2c platform devices are removed. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
-
由 Andrew Lunn 提交于
Mostly printk to pr_{err|info} changes and a few strings split over multiple lines are combined. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
-
由 Andrew Lunn 提交于
Mostly missing statics, but also missing include files and void parameters. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
-
由 Andrew Lunn 提交于
With the gradual conversion of C code to DT, there are a number of include files which are no longer needed. Remove them. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
-
由 Michael Walle 提交于
Remove unneeded includes. These are leftovers from platform device registrations. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
-
- 18 11月, 2012 2 次提交
-
-
由 Sasha Levin 提交于
Just use BUG_ON() instead of constructions such as: if (...) BUG() A simplified version of the semantic patch that makes this transformation is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; @@ - if (e) BUG(); + BUG_ON(e); // </smpl> Signed-off-by: NSasha Levin <sasha.levin@oracle.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
This pushes the dependencies on the Integrator/AP system controller (SC) down into the PCI V3 driver and the AP-specific board file. First, the platform data for the PL010 UART is moved into the integrator_ap.c board file, and the Integrator/CP is assigned with NULL pdata. This way the callback functions can reference the dynamically remapped AP syscon address in both the ATAG and DT boot path, and this remapping is localized to the board file. Second the PCIv3 driver is making its own dynamic remapping of the SC for the few registers it is using. When we convert the PCIv3 driver over to using device tree having a dynamically assigned base address will be useful, but we will have to use the definition from <mach/platform.h> for now, the only improvement is that it's done dynamically. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
- 17 11月, 2012 14 次提交
-
-
由 Linus Walleij 提交于
The Integrators does not use the UART1 for any debugging or similar, dynamic mapping should be all that is needed so delete this static map. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
The Integrator/CP does not use the address space defined as used by the Integrator/AP system controller, it's just unused memory. So just delete this static mapping from the CP static mapping table. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
This removes the static mapping for the CP system controller for the device tree case. Fork the static mappings table and move the system controller to only be statically mapped in the ATAG boot path. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
This removes the static mapping for the AP system controller for the device tree case. Fork the static mappings table and move the system controller to only be statically mapped in the ATAG boot path. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
This hooks the Integrator/CP into the SoC bus when booting from device tree, by mapping the CP controller registers first, then registering the SoC device, and then populating the device tree with the SoC device as parent. Cc: Lee Jones <lee.jones@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Linus Walleij 提交于
This hooks the Integrator/AP into the SoC bus when booting from device tree, by mapping the AP controller registers first, then registering the SoC device, and then populating the device tree with the SoC device as parent. Introduce some helpers in the core to provide sysfs files detailing the use of the SoC ID which will later be reused by the Integrator/CP patch for the same bus grouping. Cc: Lee Jones <lee.jones@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Jon Hunter 提交于
Commit "ARM: OMAP2+: Add device-tree support for 32kHz counter" added structure omap_counter_match to the OMAP2 timer code. When CONFIG_OMAP_32K_TIMER is not defined this structure generates the following as it is not used. CC arch/arm/mach-omap2/timer.o arch/arm/mach-omap2/timer.c:163:28: warning: 'omap_counter_match' defined but not used [-Wunused-variable] Move the definition of omap_counter_match to avoid this warning when CONFIG_OMAP_32K_TIMER is not set. Thanks to Kevin Hilman for tracking down and reporting this problem. Reported-by: NKevin Hilam <khilman@deeprootsystems.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
-
由 Jon Hunter 提交于
Some source files are including dmtimer.h but not actually using any dmtimer definitions or functions. Therefore, remove the inclusion dmtimer.h from these source files. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NOmar Ramirez Luna <omar.luna@linaro.org>
-
由 Jon Hunter 提交于
Move definition of dmtimer platform data structure in to its own header under <linux/platform_data>. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
-
由 Jon Hunter 提交于
Remove unnecessary declaration of structure omap_dm_timer from dmtimer.h and move the actual declaration of structure omap_dm_timer towards top of dmtimer.h to avoid any compilation errors. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
-
由 Jon Hunter 提交于
The function omap_dm_timer_init_one() declares two local variables of type int that are used to store the return value of functions called. One such local variable is sufficient and so remove one of these local variables. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
-
由 Jon Hunter 提交于
The OMAP2+ system timer code stores the physical address of the timer but never uses it. Remove this and clean-up the code by removing the local variable "size" and changing the names of the local variables mem_rsrc and irq_rsrc to mem and irq, respectively. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
-
由 Jon Hunter 提交于
The omap_dm_timer_prepare function is a local function only used in the dmtimer.c file. Therefore, make this a static function and remove its declaration from the dmtimer.h file. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
-
由 Jon Hunter 提交于
Only OMAP1 devices use the omap_dm_timer_reset() and so require the omap_dm_timer_wait_for_reset() and __omap_dm_timer_reset() functions. Therefore combine these into a single function called omap_dm_timer_reset() and simplify the code. The omap_dm_timer_reset() function is now the only place that is using the omap_dm_timer structure member "sys_stat". Therefore, remove this member and just use the register offset definition to simplify and clean-up the code. The TISTAT register is only present on revision 1 timers and so check for this in the omap_dm_timer_reset() function. Please note that for OMAP1 devices, the TIOCP_CFG register does not have the clock-activity field and so when we reset the timer for an OMAP1 device we only need to configure the idle-mode field in the TIOCP_CFG register. Signed-off-by: NJon Hunter <jon-hunter@ti.com>
-
- 16 11月, 2012 5 次提交
-
-
由 Christoph Fritz 提交于
This patch sets HPM (Host power mask bit) to bit 16 according to i.MX Reference Manual. Falsely it was set to bit 8, but this controls pull-up Impedance. Reported-by: NMichael Burkey <mdburkey@gmail.com> Cc: Stable <stable@vger.kernel.org> Signed-off-by: NChristoph Fritz <chf.fritz@googlemail.com> Acked-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Wei Yongjun 提交于
The error-valued pointer clk is used for the arg of kfree, it should be kfree(gate) if clk_register() return ERR_PTR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Nicolas Ferre 提交于
This macro is not used anymove in atmel-mci driver. It has been removed by a patch that was dealing with dw_dmac.c e2b35f3d: (dmaengine/dw_dmac: Fix dw_dmac user drivers to adapt to slave_config changes) We are now using the dmaengine API to specify the slave DMA parameters: dmaengine_slave_config(). Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com> Cc: Chris Ball <cjb@laptop.org> Cc: <linux-mmc@vger.kernel.org>
-
由 Johan Hovold 提交于
Use gpio_is_valid also for overcurrent pins (which are currently negative in many board files). Signed-off-by: NJohan Hovold <jhovold@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
-
由 Nicolas Royer 提交于
Spare irq support introduced by commit 8fe82a55 (ARM: at91: sparse irq support) involves to add the NR_IRQS_LEGACY offset to irq number. Signed-off-by: NNicolas Royer <nicolas@eukrea.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NEric Bénard <eric@eukrea.com> Tested-by: NEric Bénard <eric@eukrea.com> Cc: stable@vger.kernel.org # 3.6
-
- 15 11月, 2012 3 次提交
-
-
由 Haojian Zhuang 提交于
PXA95x isn't widely used. And it adds the effort on supporting multiple platform. So remove it. The assumption is that nobody will miss this support. If you are reading this text because you actually require pxa95x support on a new kernel, we can work out a way to revert this patch or add support to the mmp platform. Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Ivan Khoronzhuk 提交于
Replaces several flags bearing the same meaning. There is no need to set flags due to different omap types here, it can be checked in appropriate places as well. Cc: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Acked-by: NNishanth Menon <nm@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
Commit 6e740f9a (ARM: OMAP: Move omap-pm-noop.c local to mach-omap2) moved omap-pm-noop to be local to mach-omap2. However, the makefile entry got placed within ifeq ($(CONFIG_PM),y) which was not the case earlier. Fix the issue by moving it out of the ifeq ($(CONFIG_PM),y) in the makefile as these stubs are needed also when PM is not set. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 14 11月, 2012 1 次提交
-
-
由 Paul Walmsley 提交于
This reverts commit 3db11fef (ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints). This commit causes I2C timeouts to appear on several OMAP3430/3530-based boards: http://marc.info/?l=linux-arm-kernel&m=135071372426971&w=2 http://marc.info/?l=linux-arm-kernel&m=135067558415214&w=2 http://marc.info/?l=linux-arm-kernel&m=135216013608196&w=2 and appears to have been sent for merging before one of its prerequisites was merged: http://marc.info/?l=linux-arm-kernel&m=135219411617621&w=2Signed-off-by: NPaul Walmsley <paul@pwsan.com> Acked-by: NJean Pihet <j-pihet@ti.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
-