- 31 8月, 2009 1 次提交
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由 Thomas Gleixner 提交于
paravirt overrides the setup of the default apic timers as per cpu timers. Moorestown needs to override that as well. Move it to x86_init_ops setup and create a separate x86_cpuinit struct which holds the function for the secondary evtl. hotplugabble CPUs. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 09 6月, 2009 1 次提交
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由 Andreas Herrmann 提交于
Booting a 32-bit kernel on Magny-Cours results in the following panic: ... Using APIC driver default ... Overriding APIC driver with bigsmp ... Getting VERSION: 80050010 Getting VERSION: 80050010 Getting ID: 10000000 Getting ID: ef000000 Getting LVT0: 700 Getting LVT1: 10000 Kernel panic - not syncing: Boot APIC ID in local APIC unexpected (16 vs 0) Pid: 1, comm: swapper Not tainted 2.6.30-rcX #2 Call Trace: [<c05194da>] ? panic+0x38/0xd3 [<c0743102>] ? native_smp_prepare_cpus+0x259/0x31f [<c073b19d>] ? kernel_init+0x3e/0x141 [<c073b15f>] ? kernel_init+0x0/0x141 [<c020325f>] ? kernel_thread_helper+0x7/0x10 The reason is that default_get_apic_id handled extension of local APIC ID field just in case of XAPIC. Thus for this AMD CPU, default_get_apic_id() returns 0 and bigsmp_get_apic_id() returns 16 which leads to the respective kernel panic. This patch introduces a Linux specific feature flag to indicate support for extended APIC id (8 bits instead of 4 bits width) and sets the flag on AMD CPUs if applicable. Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com> Cc: <stable@kernel.org> LKML-Reference: <20090608135509.GA12431@alberich.amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 21 4月, 2009 1 次提交
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由 Suresh Siddha 提交于
Add x2apic_supported() to clean up CONFIG_X86_X2APIC checks. Fix CONFIG_INTR_REMAP checks. [ Impact: cleanup ] Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Cc: dwmw2@infradead.org Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Weidong Han <weidong.han@intel.com> LKML-Reference: <20090420200450.128993000@linux-os.sc.intel.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 19 4月, 2009 2 次提交
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由 Weidong Han 提交于
Currently, when x2apic is not enabled, interrupt remapping will be enabled in init_dmars(), where it is too late to remap ioapic interrupts, that is, ioapic interrupts are really in compatibility mode, not remappable mode. This patch always enables interrupt remapping before ioapic setup, it guarantees all interrupts will be remapped when interrupt remapping is enabled. Thus it doesn't need to set the compatibility interrupt bit. [ Impact: refactor intr-remap init sequence, enable fuller remap mode ] Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: NWeidong Han <weidong.han@intel.com> Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com> Cc: iommu@lists.linux-foundation.org Cc: allen.m.kay@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1239957736-6161-4-git-send-email-weidong.han@intel.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Weidong Han 提交于
Shouldn't call ack_apic_edge() in ir_ack_apic_edge(), because ack_apic_edge() does more than just ack: it also does irq migration in the non-interrupt-remapping case. But there is no such need for interrupt-remapping case, as irq migration is done in the process context. Similarly, ir_ack_apic_level() shouldn't call ack_apic_level, and instead should do the local cpu's EOI + directed EOI to the io-apic. ack_x2APIC_irq() is not neccessary, because ack_APIC_irq() will use MSR write for x2apic, and uncached write for non-x2apic. [ Impact: simplify/standardize intr-remap IRQ acking, fix on !x2apic ] Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: NWeidong Han <weidong.han@intel.com> Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com> Cc: iommu@lists.linux-foundation.org Cc: allen.m.kay@intel.com Cc: fenghua.yu@intel.com LKML-Reference: <1239957736-6161-3-git-send-email-weidong.han@intel.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 13 4月, 2009 1 次提交
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由 Cyrill Gorcunov 提交于
Impact: refactor, speed up and robustize code In case if apic was disabled by kernel option or by hardware limits we can use dummy operations in apic->write to simplify the ack_APIC_irq() code. At the lame time the patch fixes the missed EOI in do_IRQ function (which has place if kernel is compiled as X86-32 and interrupt without handler happens where apic was not asked to be disabled via kernel option). Note that native_apic_write_dummy() consists of WARN_ON_ONCE to catch any buggy writes on enabled APICs. Could be removed after some time of testing. Signed-off-by: NCyrill Gorcunov <gorcunov@openvz.org> LKML-Reference: <20090412165058.724788431@openvz.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 12 4月, 2009 1 次提交
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由 Jaswinder Singh Rajput 提交于
Impact: cleanup, no code changed - syscalls.h update declarations due to unifications - irq.c declare smp_generic_interrupt() before it gets used - process.c declare sys_fork() and sys_vfork() before they get used - tsc.c rename tsc_khz shadowed variable - apic/probe_32.c declare apic_default before it gets used - apic/nmi.c prev_nmi_count should be unsigned - apic/io_apic.c declare smp_irq_move_cleanup_interrupt() before it gets used - mm/init.c declare direct_gbpages and free_initrd_mem before they get used Signed-off-by: NJaswinder Singh Rajput <jaswinder@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 04 4月, 2009 2 次提交
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由 Han, Weidong 提交于
interrupt remapping must be enabled before enabling x2apic, but interrupt remapping doesn't depend on x2apic, it can be used separately. Enable interrupt remapping in init_dmars even x2apic is not supported. [dwmw2: Update Kconfig accordingly, fix build with INTR_REMAP && !X2APIC] Signed-off-by: NWeidong Han <weidong.han@intel.com> Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Fenghua Yu 提交于
This patch enables suspend/resume for interrupt remapping. During suspend, interrupt remapping is disabled. When resume, interrupt remapping is enabled again. Signed-off-by: NFenghua Yu <fenghua.yu@intel.com> Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 26 3月, 2009 1 次提交
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由 Ravikiran G Thirumalai 提交于
Partial revert of commit 129d8bc8 titled 'x86: don't compile vsmp_64 for 32bit' Commit reverted to compile vsmp_64.c if CONFIG_X86_64 is defined, since is_vsmp_box() needs to indicate that TSCs are not synchronized, and hence, not a valid time source, even when CONFIG_X86_VSMP is not defined. Signed-off-by: NRavikiran Thirumalai <kiran@scalex86.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: shai@scalex86.org LKML-Reference: <20090324061429.GH7278@localdomain> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 25 3月, 2009 1 次提交
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由 Yinghai Lu 提交于
Impact: cleanup Use online_mask directly on 64bit too. Signed-off-by: NYinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> LKML-Reference: <49C94DAE.9070300@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 18 3月, 2009 2 次提交
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由 Suresh Siddha 提交于
Impact: optimize APIC IPI related barriers Uncached MMIO accesses for xapic are inherently serializing and hence we don't need explicit barriers for xapic IPI paths. x2apic MSR writes/reads don't have serializing semantics and hence need a serializing instruction or mfence, to make all the previous memory stores globally visisble before the x2apic msr write for IPI. Add x2apic_wrmsr_fence() in flush tlb path to x2apic specific paths. Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: "steiner@sgi.com" <steiner@sgi.com> Cc: Nick Piggin <npiggin@suse.de> LKML-Reference: <1237313814.27006.203.camel@localhost.localdomain> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Suresh Siddha 提交于
Impact: cleanup, paranoia We were not clearing the local APIC in clear_local_APIC() in the presence of x2apic. Fix it. Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 05 3月, 2009 1 次提交
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由 Ingo Molnar 提交于
Make ack_APIC_irq() build on !SMP && !APIC too. Cc: Dimitri Sivanich <sivanich@sgi.com> LKML-Reference: <20090304185605.GA24419@sgi.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 26 2月, 2009 4 次提交
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由 Ingo Molnar 提交于
Impact: cleanup - rename apic->wakeup_cpu to apic->wakeup_secondary_cpu, to make it apparent that this is an SMP-only method - handle NULL ->wakeup_secondary_cpus to mean the default INIT wakeup sequence - this allows simplification of the APIC driver templates. Cc: Yinghai Lu <yinghai@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Impact: build fix wakeup_secondary_cpu_via_init(), the default platform method for booting a secondary CPU, is always used on UP due to probe_32.c, if CONFIG_X86_LOCAL_APIC is enabled but SMP is off. So provide a UP wrapper inline as well. Cc: Yinghai Lu <yinghai@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Yinghai Lu 提交于
Impact: cleanup that is only needed when CONFIG_X86_VSMP is defined with 64bit also remove dead code about PCI, because CONFIG_X86_VSMP depends on PCI Signed-off-by: NYinghai Lu <yinghai@kernel.org> Cc: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Yinghai Lu 提交于
Impact: cleanup x86_quirks->update_apic() calling looks crazy. so try to remove it: 1. every apic take wakeup_cpu member directly 2. separate es7000_apic to es7000_apic_cluster 3. use uv_wakeup_cpu directly Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 23 2月, 2009 1 次提交
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由 Suresh Siddha 提交于
If BIOS hands over the control to OS in legacy xapic mode, select legacy xapic related ops in the early apic probe and shift to x2apic ops later in the boot sequence, only after enabling x2apic mode. If BIOS hands over the control in x2apic mode, select x2apic related ops in the early apic probe. This fixes the early boot panic, where we were selecting x2apic ops, while the cpu is still in legacy xapic mode. Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 18 2月, 2009 4 次提交
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由 Ingo Molnar 提交于
Impact: cleanup Now that all APIC code is consolidated there's nothing 'gen' about apics anymore - so rename 'struct genapic' to 'struct apic'. This shortens the code and is nicer to read as well. Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Impact: cleanup It's not used by anything anymore. Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
extern declarations were scattered in 4 files - consolidate them into apic.h. Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Impact: cleanup Reduce the number of include files to worry about. Also, most of the users of APIC facilities had to include genapic.h already, which embedded apic.h, so the distinction was meaningless. [ include apic.h from genapic.h for compatibility. ] Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 17 2月, 2009 2 次提交
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由 Yinghai Lu 提交于
Impact: cleanup make it simpler, don't need have one extra struct. v2: fix the sgi_uv build Signed-off-by: NYinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Yinghai Lu 提交于
Impact: cleanup so could deselect x2apic and INTR_REMAP will select x2apic Signed-off-by: NYinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 11 2月, 2009 1 次提交
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由 Ingo Molnar 提交于
Impact: build fix Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 10 2月, 2009 1 次提交
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由 Jeremy Fitzhardinge 提交于
Mainly to get proper type-checking and consistency. Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
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- 29 1月, 2009 4 次提交
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由 Ingo Molnar 提交于
Remove the 32-bit subarchitecture support code. All subarchitectures but Voyager have been converted. Voyager will be done later or will be removed. Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Spread mach_apic.h definitions into genapic.h. (with some knock-on effects on smp.h and apic.h.) Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Move its definitions into apic.h. Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Spread mach_wakecpu.h's definitions into apic.h and genapic.h and remove mach_wakecpu.h. Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 31 12月, 2008 1 次提交
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由 Jaswinder Singh Rajput 提交于
Impact: cleanup, reduce kernel size a bit, avoid sparse warning Fixes sparse warning: arch/x86/kernel/apic.c:270:5: warning: symbol 'x2apic_icr_read' was not declared. Should it be static? Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 27 12月, 2008 1 次提交
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由 Jaswinder Singh 提交于
Impact: cleanup, reduce kernel size a bit, avoid sparse warning Fixes sparse warning: arch/x86/kernel/apic.c:103:5: warning: symbol 'disable_x2apic' was not declared. Should it be static? Signed-off-by: NJaswinder Singh <jaswinder@infradead.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 11 11月, 2008 1 次提交
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由 Ivan Vecera 提交于
Impact: really halt all CPUs on halt Function machine_halt (resp. native_machine_halt) is empty for x86 architectures. When command 'halt -f' is invoked, the message "System halted." is displayed but this is not really true because all CPUs are still running. There are also similar inconsistencies for other arches (some uses power-off for halt or forever-loop with IRQs enabled/disabled). IMO there should be used the same approach for all architectures OR what does the message "System halted" really mean? This patch fixes it for x86. Signed-off-by: NIvan Vecera <ivecera@redhat.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 23 10月, 2008 2 次提交
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由 H. Peter Anvin 提交于
Change header guards named "ASM_X86__*" to "_ASM_X86_*" since: a. the double underscore is ugly and pointless. b. no leading underscore violates namespace constraints. Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 16 10月, 2008 2 次提交
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由 Yinghai Lu 提交于
APIC_ARBPRI is a reserved register for XAPIC and beyond. APIC_RRR is a reserved register except for 82489DX, APIC for Pentium processors. APIC_EOI is a write only register. APIC_DFR is reserved in x2apic mode. Access to these registers in x2apic will result in #GP fault. Fix these apic register accesses. Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Yinghai Lu 提交于
no user left. Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 24 7月, 2008 1 次提交
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由 Maciej W. Rozycki 提交于
Adjust a comment in ack_APIC_irq() according to the recent removal of CONFIG_X86_GOOD_APIC. Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 23 7月, 2008 1 次提交
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由 Jaswinder Singh 提交于
declared following smp interrupts in asm-x86/hw_irq.h: smp_apic_timer_interrupt, smp_spurious_interrupt, smp_error_interrupt Signed-off-by: NJaswinder Singh <jaswinder@infradead.org>
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