1. 17 12月, 2009 4 次提交
    • W
      MIPS: Loongson: Add basic Loongson 2F support · 6f7a251a
      Wu Zhangjin 提交于
      Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
      has a programming interface similiar to the the FPGA northbridge used on
      Loongson 2E.
      
      The main differences between Loongson 2E and Loongson 2F include:
      
      1. Loongson 2F has an extra address window configuration module, which
         is used to map CPU address space to DDR or PCI address space, or map
         the PCI-DMA address space to DDR or LIO address space.
      
      2. Loongson 2F supports 8 levels of software configurable CPu frequency
         which can be configured in the LOONGSON_CHIPCFG0 register.  The coming
         cpufreq and standby support are based on this feature.
      
      Loongson.h abstracts the modules and corresponding methods are abstracted.
      
      Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
      memory space, PCI IO space, DMA address.
      Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
      Cc: linux-mips@linux-mips.org
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      6f7a251a
    • R
      MIPS: Remove addinitrd and CONFIG_PROBE_INITRD_HEADER · 32028f1f
      Ralf Baechle 提交于
      Addinitrd has been superseded by initramfs ages ago.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      32028f1f
    • D
      MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors. · 82622284
      David Daney 提交于
      Processors that support the mips64r2 ISA can in four instructions
      convert a shifted PGD pointer stored in the upper bits of c0_context
      into a usable pointer.  By doing this we save a memory load and
      associated potential cache miss in the TLB exception handlers.
      
      Since the upper bits of c0_context were holding the CPU number, we
      move this to the upper bits of c0_xcontext which doesn't have enough
      bits to hold the PGD pointer, but has plenty for the CPU number.
      Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      82622284
    • W
      MIPS: Add support for GZIP / BZIP2 / LZMA compressed kernel images · 1b93b3c3
      Wu Zhangjin 提交于
      This patch helps to generate smaller kernel images for linux-MIPS,
      
      Here is the effect when using lzma:
      
      $ ls -sh vmlinux
      7.1M vmlinux
      $ ls -sh vmlinuz
      1.5M vmlinuz
      
      Have tested the 32bit kernel on Qemu/Malta and 64bit kernel on FuLoong
      Mini PC. both of them work well. and also, tested by Alexander Clouter
      on an AR7 based Linksys WAG54Gv2, and by Manuel Lauss on an Alchemy
      board.
      
      This -v2 version incorporate the feedback from Ralf, and add the
      following changes:
      
      1. add .ecoff, .bin, .erec format support
      2. only enable it and the debug source code for the machines we tested
      3. a dozen of fixups and cleanups
      
      and if you want to enable it for your board, please try to select
      SYS_SUPPORTS_ZBOOT for it, and if the board have an 16550 compatible
      uart, you can select SYS_SUPPORTS_ZBOOT_UART16550 directly. and then
      sending the relative patches to Ralf.
      Tested-by: NManuel Lauss <manuel.lauss@googlemail.com>
      Tested-by: NAlexander Clouter <alex@digriz.org.uk>
      Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      1b93b3c3
  2. 02 12月, 2009 3 次提交
  3. 14 11月, 2009 1 次提交
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  5. 18 9月, 2009 6 次提交
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  8. 17 6月, 2009 3 次提交
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  12. 14 3月, 2009 1 次提交
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  15. 11 1月, 2009 2 次提交