- 26 5月, 2011 1 次提交
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由 Rupjyoti Sarmah 提交于
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex. Signed-off-by: NRupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: NTirumala R Marri <tmarri@apm.com> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 02 2月, 2011 2 次提交
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由 Rupjyoti Sarmah 提交于
This fix is a reset for USB PHY that requires some amount of time for power to be stable on Canyonlands. Signed-off-by: NRupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Tirumala Marri 提交于
Add Synopsys Designware DTS entry for 460EX based Canyonlands board. Signed-off-by: Tirumala R Marri<tmarri@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 29 11月, 2010 1 次提交
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由 Victor Gallardo 提交于
- Add Clock Power Management (CPM) node to dts tree - Add idle-doze entry in CPM node - Add standby entry in CPM node - Add PM and SUSPEND support by default in defconfig - Remove UART2 and UART3 as they are unused, this will allow CPM to put unused-units (UART2 and UART3) to sleep. Signed-off-by: NVictor Gallardo <vgallardo@apm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 23 8月, 2010 1 次提交
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由 Rupjyoti Sarmah 提交于
Device tree update for the Applied micro processor 460ex on-chip SATA Signed-off-by: NRupjyoti Sarmah <rsarmah@amcc.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 26 7月, 2010 1 次提交
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由 Stefan Roese 提交于
UART2 and UART3 on 460EX/GT have incorrect interrupt mappings right now. UART2 should be 28 (0x1c) and UART3 29 (0x1d). This patch fixes this and switches to using decimal number instead of hex, since the AppliedMicro (AMCC) users manuals describe their inerrupt numbers in decimal. Thanks to Fabien Proriol for pointing this out. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Fabien Proriol <Fabien.Proriol@jdsu.com> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 04 11月, 2009 1 次提交
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由 Dave Mitchell 提交于
Adding tx/rx-fifo-size-gige to EMAC fields for evaluation kit DTS files where appropriate. Signed-off-by: NDave Mitchell <dmitchell@appliedmicro.com> Acked-by: NProdyut Hazarika <phazarika@appliedmicro.com> Acked-by: NVictor Gallardo <vgallardo@appliedmicro.com> Acked-by: NLoc Ho <lho@appliedmicro.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 20 8月, 2009 1 次提交
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由 Stefan Roese 提交于
Also some whitespace cleanup in the USB device nodes. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 18 2月, 2009 1 次提交
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由 James Hsiao 提交于
This patch adds support for AMCC ppc4xx security device driver. This is the initial release that includes the driver framework with AES and SHA1 algorithms support. The remaining algorithms will be released in the near future. Signed-off-by: NJames Hsiao <jhsiao@amcc.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 15 2月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
This adds the device-tree entries for a handful of devices on the Canyonlands board, such as the EHCI and OHCI controllers, the real time clock and the AD7414 thermal monitor. I also updated the defconfig to enable various options related to these devices. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 11 12月, 2008 1 次提交
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由 Stefan Roese 提交于
With this patch the L2 cache is enabled on Canyonlands to increase the overall performance. There is a known cache coherency issue with the L2 cache, but this is related to the high bandwidth (HB) PLB segment where the memory address is 0x8.xxxx.xxxx (low bandwidth PLB segment is mapped to 0x0.xxxx.xxxx). Since this HB address is currently unused it is safe to enable the L2 cache. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 04 12月, 2008 1 次提交
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由 Benjamin Herrenschmidt 提交于
This adds support for ISA memory holes on the PCI, PCI-X and PCI-E busses of the 4xx platforms. The patch includes changes to the Bamboo and Canyonlands device-trees to add such a hole, others can be updated separately. The ISA memory hole is an additional outbound window configured in the bridge to generate PCI cycles in the low memory addresses, thus allowing to access things such as the hard-decoded VGA aperture at 0xa0000..0xbffff or other similar things. It's made accessible to userspace via the new legacy_mem file in sysfs for which support was added by a previous patch. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 09 7月, 2008 1 次提交
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由 Grant Erickson 提交于
Various instances of the EMAC core have varying: 1) number of address match slots, 2) width of the registers for handling address match slots, 3) number of registers for handling address match slots and 4) base offset for those registers. As the driver stands today, it assumes that all EMACs have 4 IAHT and GAHT 32-bit registers, starting at offset 0x30 from the register base, with only 16-bits of each used for a total of 64 match slots. The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4 core. This core has 8 IAHT and GAHT registers, starting at offset 0x80 from the register base, with ALL 32-bits of each used for a total of 256 match slots. This adds a new compatible device tree entry "emac4sync" and a new, related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros and inlines which supply the appropriate parameterized value based on the presence or absence of the EMAC4SYNC feature. The code has further been reworked where appropriate to use those macros and inlines. In addition, the register size passed to ioremap is now taken from the device tree: c4 for EMAC4SYNC cores 74 for EMAC4 cores 70 for EMAC cores rather than sizeof (emac_regs). Finally, the device trees have been updated with the appropriate compatible entries and resource sizes. This has been tested on an AMCC Haleakala board such that: 1) inbound ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11 and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from 'haleakala.local' to those same systems in the '.local' domain via MDNS now work. Signed-off-by: NGrant Erickson <gerickson@nuovations.com> Acked-by: NJeff Garzik <jgarzik@pobox.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 29 5月, 2008 1 次提交
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由 David Gibson 提交于
At the moment we have a mixture of left-over version 0 and new-format version 1 files in arch/powerpc/boot/dts. This is potentially confusing to people new to the dts format attempting to figure it out. So, this patch converts all the as-yet unconverted dts v0 files and converts them to v1. They're mechanically-converted, and not hand tweaked so in some cases they're not 100% in keeping with usual v1 style, but the convertor program does have some heuristics so the discrepancies aren't too bad. I have checked that this patch produces no changes to the resulting dtb binaries. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 25 4月, 2008 1 次提交
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由 Stefan Roese 提交于
This patch adds default NOR entries to the AMCC Canyonlands (460EX) and Glacier (460GT) dts files. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 05 4月, 2008 1 次提交
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由 Stefan Roese 提交于
This patch fixes some problems in the Canyonlands 460EX and Glacier 460GT dts files: - Add "mdio-device = <&EMAC0>" to all all EMAC's except for EMAC0 itself (the 460EX/GT only can access the PHY via the EMAC0 instance) - Add TAH support to Canyonlands dts Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 26 3月, 2008 1 次提交
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由 Stefan Roese 提交于
This dts source file for the AMCC 460EX Canyonlands evalutaion board Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 27 2月, 2008 1 次提交
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由 Stefan Roese 提交于
This patch changes the katmai (440SPe) L1 cache size to 32k. Some whitespace issues are cleaned up too. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 16 2月, 2008 1 次提交
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由 Stefan Roese 提交于
Remove all "i2c" and "xxmii-interface" (rgmii etc) device_type entries from the 4xx dts files. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 24 12月, 2007 4 次提交
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Josh Boyer 提交于
Recent DTC versions disallow certain special characters in full paths without being quoted with {}. That however breaks compatibility with older DTC versions. Work around this by renaming the CPU nodes for the 4xx files to a generic node name, and specify the processor type in the model property of the CPU node. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Stefan Roese 提交于
This patch adds runtime detection of the 440SPe revision A chips. These chips are equipped with a slighly different PCIe core and need special/ different initialization. The compatible node is changed to "plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that can be equipped with both PPC revisions like the AMCC Yucca. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Benjamin Herrenschmidt 提交于
This adds base support for the Katmai board, including PCI-X and PCI-Express (but no RTC, nvram, etc... yet). Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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