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  1. 23 2月, 2009 1 次提交
  3. 22 2月, 2009 2 次提交
    • R
      etherh: Get working again. · 7d3d5ec1
      由 Russell King 提交于 
      Further to a71558d0, this is round five of fixes to make etherh work
again. As mainline kernels stand, the fixes in b9a9b4b0 were the wrong
approach.

The 8390 driver was structured by Al Viro to allow the flexibility required
by platforms.  lib8390.c contains the core code which drivers explicitly
include:
- 8390.c includes lib8390.c to provide the standard ISA based driver.
- etherh.c includes it with the accessors defined for RiscPC platforms,
  where it is addressed via the MMIO accessors with a device dependent
  register spacing.

Other platform drivers do something similar.

However, b9a9b4b0 caused the kernel to contain not only the etherh private
build of lib8390 (included in etherh.c) but also lib8390.c itself, and
referred the new net_device_ops methods to the ISA version.  The result
of this is is not pretty:

Unable to handle kernel paging request at virtual address 12032030
pgd = c8330000
[12032030] *pgd=00000000
Internal error: Oops: 18331805 [#1]
Modules linked in: ipv6
CPU: 0    Not tainted  (2.6.29-rc3 #167)
PC is at do_set_multicast_list+0xd0/0x190
LR is at bitrev32+0x28/0x34
pc : [<c017aab4>]    lr : [<c0139120>]    psr: a0000093
sp : c8321d9c  ip : c8321d84  fp : c8321dbc
r10: c80c6800  r9 : 00000000  r8 : c80c6b60
r7 : c80c6b80  r6 : cc80c800  r5 : c80c6800  r4 : 00000000
r3 : cc80c80c  r2 : 00000004  r1 : 00000007  r0 : e0000000
Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment user
...

Fix up b9a9b4b0 by making etherh's net_device_ops refer to the internal
lib8390 functions, and remove the build of the ISA 8390.c driver.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7d3d5ec1
    • D
      ixgbe: fix for 82598 Si errata causing buffer overflow · 54037505
      由 Don Skidmore 提交于 
      The failure happens when an interrupt occurs and the driver is reading
EICR.  This read will cause a clear-by-read which leads to two TLP
being inserted in the PCIe retry buffer leading to an overflow of the
buffer and corruption of TLPs.

The solution is different depending where the reading of EICR takes place.

For ixgbe_msix_lsc() since we are in MSIX mode and know OCD is enabled a
clear-by-write is done instead of the normal clear-by-read.

For ixgbe_intr() 0xffffffff is written to EIMC before the read, masking the
interrupts.
Signed-off-by: NDon Skidmore <donald.c.skidmore@intel.com>
Acked-by: NPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      54037505
  5. 20 2月, 2009 8 次提交
  7. 19 2月, 2009 7 次提交
  9. 18 2月, 2009 22 次提交