The gic.h header uses bitmaps and NR_CPUS, and should therefore include
linux/bitmap.h and linux/threads.h. This is in preparation for use of
this header in a subsequent commit from a C file which doesn't already
include those headers.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6357/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NTony Wu <tung7970@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5535/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add new clockevent driver that uses the counter present on the MIPS
Global Interrupt Controller.
Signed-off-by: NRaghu Gandham <Raghu.Gandham@imgtec.com>
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Various whitespace and #ifdef removals for GIC and R4K clocksources.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Reorganize some of the GIC clocksource driver code. Below is a list of
the various changes.

  * No longer select CSRC_GIC by default for Malta platform.
  * Limit choice for either the GIC or R4K clocksource, not both.
  * Change location in Makefile.
  * Created new 'gic_read_count' function in common 'irq-gic.c' file.
  * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function.
  * Surround GIC specific code in Malta platform code with #ifdef's.
  * Only initialize the GIC clocksource if it was selected. Original
    code called it unconditionally if a GIC was found.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Move the global variable 'gic_frequency' to be defined in the file
'arch/mips/kernel/irq-gic.c' instead of defining it individually
for each platform making use of the GIC. Also change the type to
be an unsigned integer instead of signed.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Move the global variable 'gic_present' to be defined in the file
'arch/mips/kernel/irq-gic.c' instead of defining it individually
for each platform making use of the GIC. Also change the type to
be an unsigned integer instead of signed.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Add new clocksource that uses the counter present on the MIPS
Global Interrupt Controller.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4681/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Fix whitespace, beautify the code and remove debug statements.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

The GIC interrupt code is used by multiple platforms and the
current code was half Malta dependent code. These changes
abstract away the platform specific differences.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

This change adds macros for routing of GIC interrupts for EIC and
non-EIC hardware modes. Also added Malta GIC macros having to do
with performance and timer interrupts.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3576/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This prevents the GIC code from being reusable sanely.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NChris Dearman <chris@mips.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Commit fc03bc1715ca0ad4ccfe97aab16bcc9e7129c1a4 breaks compiling MIPS
with SMP disabled.  This patch fixes that.
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Most of the CMP support was added before, this mostly correct compile
problems but adds a platform specific translation for the interrupt number
based on cpu number.
Signed-off-by: NTim Anderson <tanderson@mvista.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch extends the GIC interrupt handling beyond the current 32 bit
range as well as extending the number of interrupts based on the number
of CPUs.
Signed-off-by: NTim Anderson <tanderson@mvista.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Fix 64-bit Malta by using CKSEG0ADDR and correct casts.
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Parenthesis fix in include/asm-mips/gic.h
Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NChris Dearman <chris@mips.com>
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>