- 22 11月, 2014 2 次提交
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由 Yijing Wang 提交于
There are no users of the struct hw_pci.add_bus() or .remove_bus() methods, so remove the pointers from hw_pci. That makes pcibios_add_bus() and pcibios_remove_bus() themselves superfluous, so remove them as well. [bhelgaas: changelog] Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
Currently ARM associates an MSI controller with a PCI bus by defining pcibios_add_bus() and using it to call a struct hw_pci.add_bus() method. That method sets the struct pci_bus "msi" member. That's unwieldy and unnecessarily couples MSI with the PCI enumeration code. On ARM, all devices under the same PCI host bridge share an MSI controller, so add an msi_controller pointer to the struct pci_sys_data and implement pcibios_msi_controller() to retrieve it. This is a step toward moving the msi_controller pointer into the generic struct pci_host_bridge. [bhelgaas: changelog, take pci_dev instead of pci_bus] Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 17 9月, 2013 1 次提交
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由 Linus Walleij 提交于
The Shark machine sub-architecture (also known as DNARD, the DIGITAL Network Appliance Reference Design) lacks a maintainer able to apply and test patches to modernize the architecture. It is suspected that the current kernel, while it compiles, does not even boot on this machine. The listed maintainer has expressed that he will not be able to spend any time on the maintenance for the coming year. So let's delete it from the kernel for now. It can always be resurrected with git revert if maintenance is resumed. As the VIA82c505 PCI adapter was only used by this architecture, that gets deleted too. Cc: arm@kernel.org Cc: Alexander Schulz <alex@shark-linux.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 12 8月, 2013 1 次提交
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由 Thomas Petazzoni 提交于
Some PCI drivers may need to adjust the pci_bus structure after it has been allocated by the Linux PCI core. The PCI core allows architectures to implement the pcibios_add_bus() and pcibios_remove_bus() for this purpose. This commit therefore extends the hw_pci and pci_sys_data structures of the ARM PCI core to allow PCI drivers to register ->add_bus() and ->remove_bus() in hw_pci, which will get called when a bus is added or removed from the system. This will be used for example by the Marvell PCIe driver to connect a particular PCI bus with its corresponding MSI chip to handle Message Signaled Interrupts. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: NThierry Reding <thierry.reding@gmail.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NDaniel Price <daniel.price@gmail.com> Tested-by: NThierry Reding <thierry.reding@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 03 6月, 2013 2 次提交
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由 Linus Walleij 提交于
The Integrator/AP PCI bridget, "v3" is contained in two files, where pci.c is a socket container to plug in the v3 device. However to transition the v3 to enable device tree probing, it need to be converted to a platform device (so that it can have a device node in the device tree) and then we want the PCI driver in a single file, as any other device driver, so we can handle variants using compatible strings and device name, and get the base address etc from resources connected to the device node. To move toward this goal we consolidate all code in the pci_v3.c file. Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
When working with device tree support for PCI on ARM you run into a problem when mapping IRQs from the device tree irqmaps: doing this the code in drivers/of/of_pci_irq.c will try to find the OF node on the root bridge and this fails, because bus->dev.of_node is NULL, and that in turn boils down to the fact that pci_set_bus_of_node() has called pcibios_get_phb_of_node() from drivers/pci/of.c to obtain the OF node of the bridge or its parent and none is set and thus NULL is returned. Fix this by adding an additional parent argument API for registering PCI bridges on the ARM architecture called pci_common_init_dev(), and pass along this parent to pci_scan_root_bus() called from pcibios_init_hw() in bios32.c and voila: the IRQ mappings start working: the OF node can be retrieved from the parent. Create the old pci_common_init() as a wrapper around the new call. Cc: Mike Rapoport <mike@compulab.co.il> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Benjamin Herrenschmitt <benh@kernel.crashing.org> Reviewed-by: NAndrew Murray <andrew.murray@arm.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 4月, 2013 1 次提交
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由 Thomas Petazzoni 提交于
The PCI specifications says that an I/O region must be aligned on a 4 KB boundary, and a memory region aligned on a 1 MB boundary. However, the Marvell PCIe interfaces rely on address decoding windows (which allow to associate a range of physical addresses with a given device). For PCIe memory windows, those windows are defined with a 1 MB granularity (which matches the PCI specs), but PCIe I/O windows can only be defined with a 64 KB granularity, so they have to be 64 KB aligned. We therefore need to tell the PCI core about this special alignement requirement. The PCI core already calls pcibios_align_resource() in the ARM PCI core, specifically for such purposes. So this patch extends the ARM PCI core so that it calls a ->align_resource() hook registered by the PCI driver, exactly like the existing ->map_irq() and ->swizzle() hooks. A particular PCI driver can register a align_resource() hook, and do its own specific alignement, depending on the specific constraints of the underlying hardware. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 2月, 2013 1 次提交
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由 Thierry Reding 提交于
In order to allow drivers to specify private data for each controller, this commit adds a private_data field to the struct hw_pci. This field is an array of nr_controllers pointers that will be used to initialize the private_data field of the corresponding controller's pci_sys_data structure. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 26 7月, 2012 1 次提交
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由 Rob Herring 提交于
With consolidation of the PCI i/o mappings, the i/o space is being set to start at a PCI bus addr of 0x0 and fixed to 64K per bus. In this case the core ARM PCI setup code can setup the i/o resource. Currently, the resource is only setup if the platform did not setup an i/o resource. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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- 25 7月, 2012 1 次提交
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由 Rob Herring 提交于
This adds a fixed virtual mapping for PCI i/o addresses. The mapping is located at the last 2MB of vmalloc region (0xfee00000-0xff000000). 2MB is used to align with PMD size, but IO_SPACE_LIMIT is 1MB. The space is reserved after .map_io and can be mapped at any time later with pci_ioremap_io. Platforms which need early i/o mapping (e.g. for vga console) can call pci_map_io_early in their .map_io function. This has changed completely from the 1st implementation which only supported creating the static mapping at .map_io. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: NNicolas Pitre <nico@linaro.org>
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- 16 5月, 2012 1 次提交
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由 Russell King 提交于
No one uses the per-hw list of buses, so get rid of this. Instead, build the list locally. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 5月, 2012 2 次提交
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由 Russell King 提交于
Most PCI implementations perform simple root bus scanning. Rather than having each group of platforms provide a duplicated bus scan function, provide the PCI configuration ops structure via the hw_pci structure, and call the root bus scanning function from core ARM PCI code. Acked-by: NKrzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Most PCI implementations use the standard PCI swizzle function, which handles the well defined behaviour of PCI-to-PCI bridges which can be found on cards (eg, four port ethernet cards.) Rather than having almost every platform specify the standard swizzle function, make this the default when no swizzle function is supplied. Therefore, a swizzle function only needs to be provided when there is something exceptional which needs to be handled. This gets rid of the swizzle initializer from 47 files, and leaves us with just two platforms specifying a swizzle function: ARM Integrator and Chalice CATS. Acked-by: NKrzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 26 4月, 2012 1 次提交
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由 Russell King 提交于
Some platforms mark their hw_pci structure as __initdata, which means it will be discarded after init time. Storing pointers to __initdata in long lived data structures is a potential source of problems, and in this case, sys->hw is unused apart from its initialization. So, lets remove this member and its initializer. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 1月, 2012 1 次提交
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由 Bjorn Helgaas 提交于
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. CC: Russell King <linux@arm.linux.org.uk> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 22 7月, 2011 1 次提交
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由 Ralf Baechle 提交于
Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: N"David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: NPaul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 17 7月, 2010 1 次提交
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由 Saeed Bishara 提交于
Add private_data pointer to the pci_sys_data, this pointer can be used for holding platform specific data for each pci controller. Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 23 4月, 2010 1 次提交
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由 Anton Vorontsov 提交于
This patch adds support for PCI domains on ARM platforms. Also, protect asm/mach/pci.h from multiple inclustions, otherwise build fails because of pci_domain_nr() and pci_proc_domain() redefinitions. Signed-off-by: NAnton Vorontsov <avorontsov@mvista.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 08 1月, 2009 1 次提交
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由 Bjorn Helgaas 提交于
Use the generic pci_common_swizzle() instead of arch-specific code. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 03 8月, 2008 1 次提交
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由 Russell King 提交于
Move platform independent header files to arch/arm/include/asm, leaving those in asm/arch* and asm/plat* alone. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 3月, 2008 1 次提交
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由 Dan Williams 提交于
Platforms like iq80321 and iq80331 which may be host-bus-adapters require 'iop3xx_init_atu=y' to be specified on the kernel command line. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 25 9月, 2006 2 次提交
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由 Lennert Buytenhek 提交于
Switch the iop32x and iop33x code over to the common PCI implementation, and remove the (nearly identical) iop32x and iop33x PCI implementations. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Lennert Buytenhek 提交于
Merge the iop32x PCI code and iop33x PCI code into plat-iop/pci.c. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 6月, 2006 1 次提交
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由 Greg Kroah-Hartman 提交于
Based on a patch series originally from Vivek Goyal <vgoyal@in.ibm.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 17 4月, 2005 1 次提交
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由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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