1. 16 1月, 2014 1 次提交
  2. 13 1月, 2014 1 次提交
    • D
      sched: Add new scheduler syscalls to support an extended scheduling parameters ABI · d50dde5a
      Dario Faggioli 提交于
      Add the syscalls needed for supporting scheduling algorithms
      with extended scheduling parameters (e.g., SCHED_DEADLINE).
      
      In general, it makes possible to specify a periodic/sporadic task,
      that executes for a given amount of runtime at each instance, and is
      scheduled according to the urgency of their own timing constraints,
      i.e.:
      
       - a (maximum/typical) instance execution time,
       - a minimum interval between consecutive instances,
       - a time constraint by which each instance must be completed.
      
      Thus, both the data structure that holds the scheduling parameters of
      the tasks and the system calls dealing with it must be extended.
      Unfortunately, modifying the existing struct sched_param would break
      the ABI and result in potentially serious compatibility issues with
      legacy binaries.
      
      For these reasons, this patch:
      
       - defines the new struct sched_attr, containing all the fields
         that are necessary for specifying a task in the computational
         model described above;
      
       - defines and implements the new scheduling related syscalls that
         manipulate it, i.e., sched_setattr() and sched_getattr().
      
      Syscalls are introduced for x86 (32 and 64 bits) and ARM only, as a
      proof of concept and for developing and testing purposes. Making them
      available on other architectures is straightforward.
      
      Since no "user" for these new parameters is introduced in this patch,
      the implementation of the new system calls is just identical to their
      already existing counterpart. Future patches that implement scheduling
      policies able to exploit the new data structure must also take care of
      modifying the sched_*attr() calls accordingly with their own purposes.
      Signed-off-by: NDario Faggioli <raistlin@linux.it>
      [ Rewrote to use sched_attr. ]
      Signed-off-by: NJuri Lelli <juri.lelli@gmail.com>
      [ Removed sched_setscheduler2() for now. ]
      Signed-off-by: NPeter Zijlstra <peterz@infradead.org>
      Link: http://lkml.kernel.org/r/1383831828-15501-3-git-send-email-juri.lelli@gmail.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      d50dde5a
  3. 12 1月, 2014 2 次提交
    • T
      ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling · b25f3e1c
      Taras Kondratiuk 提交于
      Kexec disables outer cache before jumping to reboot code, but it doesn't
      flush it explicitly. Flush is done implicitly inside of l2x0_disable().
      But some SoC's override default .disable handler and don't flush cache.
      This may lead to a corrupted memory during Kexec reboot on these
      platforms.
      
      This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable()
      handlers to make it consistent with default l2x0_disable().
      Acked-by: NRob Herring <rob.herring@calxeda.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NTaras Kondratiuk <taras.kondratiuk@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b25f3e1c
    • P
      arch: Introduce smp_load_acquire(), smp_store_release() · 47933ad4
      Peter Zijlstra 提交于
      A number of situations currently require the heavyweight smp_mb(),
      even though there is no need to order prior stores against later
      loads.  Many architectures have much cheaper ways to handle these
      situations, but the Linux kernel currently has no portable way
      to make use of them.
      
      This commit therefore supplies smp_load_acquire() and
      smp_store_release() to remedy this situation.  The new
      smp_load_acquire() primitive orders the specified load against
      any subsequent reads or writes, while the new smp_store_release()
      primitive orders the specifed store against any prior reads or
      writes.  These primitives allow array-based circular FIFOs to be
      implemented without an smp_mb(), and also allow a theoretical
      hole in rcu_assign_pointer() to be closed at no additional
      expense on most architectures.
      
      In addition, the RCU experience transitioning from explicit
      smp_read_barrier_depends() and smp_wmb() to rcu_dereference()
      and rcu_assign_pointer(), respectively resulted in substantial
      improvements in readability.  It therefore seems likely that
      replacing other explicit barriers with smp_load_acquire() and
      smp_store_release() will provide similar benefits.  It appears
      that roughly half of the explicit barriers in core kernel code
      might be so replaced.
      
      [Changelog by PaulMck]
      Reviewed-by: N"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
      Signed-off-by: NPeter Zijlstra <peterz@infradead.org>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
      Cc: Michael Ellerman <michael@ellerman.id.au>
      Cc: Michael Neuling <mikey@neuling.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Victor Kaplansky <VICTORK@il.ibm.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Oleg Nesterov <oleg@redhat.com>
      Link: http://lkml.kernel.org/r/20131213150640.908486364@infradead.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      47933ad4
  4. 11 1月, 2014 3 次提交
  5. 08 1月, 2014 1 次提交
  6. 05 1月, 2014 3 次提交
  7. 31 12月, 2013 1 次提交
  8. 29 12月, 2013 4 次提交
    • L
      ARM: 7931/1: Correct virt_addr_valid · efea3403
      Laura Abbott 提交于
      The definition of virt_addr_valid is that virt_addr_valid should
      return true if and only if virt_to_page returns a valid pointer.
      The current definition of virt_addr_valid only checks against the
      virtual address range. There's no guarantee that just because a
      virtual address falls bewteen PAGE_OFFSET and high_memory the
      associated physical memory has a valid backing struct page. Follow
      the example of other architectures and convert to pfn_valid to
      verify that the virtual address is actually valid. The check for
      an address between PAGE_OFFSET and high_memory is still necessary
      as vmalloc/highmem addresses are not valid with virt_to_page.
      
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Nicolas Pitre <nico@linaro.org>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NLaura Abbott <lauraa@codeaurora.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      efea3403
    • S
      ARM: 7923/1: mm: fix dcache flush logic for compound high pages · 2a7cfcbc
      Steven Capper 提交于
      When given a compound high page, __flush_dcache_page will only flush
      the first page of the compound page repeatedly rather than the entire
      set of constituent pages.
      
      This error was introduced by:
         0b19f933 ARM: mm: Add support for flushing HugeTLB pages.
      
      This patch corrects the logic such that all constituent pages are now
      flushed.
      
      Cc: stable@vger.kernel.org # 3.10+
      Signed-off-by: NSteve Capper <steve.capper@linaro.org>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      2a7cfcbc
    • R
      ARM: fix footbridge clockevent device · 4ff859fe
      Russell King 提交于
      The clockevents code was being told that the footbridge clock event
      device ticks at 16x the rate which it actually does.  This leads to
      timekeeping problems since it allows the clocksource to wrap before
      the kernel notices.  Fix this by using the correct clock.
      
      Fixes: 4e8d7637 ("ARM: footbridge: convert to clockevents/clocksource")
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Cc: <stable@vger.kernel.org>
      4ff859fe
    • L
      ARM: pxa: fix USB gadget driver compilation regression · 9928422f
      Linus Walleij 提交于
      After commit 88f718e3
      "ARM: pxa: delete the custom GPIO header" a compilation
      error was introduced in the PXA25x gadget driver.
      An attempt to fix the problem was made in
      commit b144e4ab
      "usb: gadget: fix pxa25x compilation problems"
      by explictly stating the driver needs the <mach/hardware.h>
      header, which solved the compilation for a few boards,
      such as the pxa255-idp and its defconfig.
      
      However the Lubbock board has this special clause in
      drivers/usb/gadget/pxa25x_udc.c:
      
      This include file has an implicit dependency on
      <mach/irqs.h> having been included before <mach/lubbock.h>
      was included.
      
      Before commit 88f718e3
      "ARM: pxa: delete the custom GPIO header" this implicit
      dependency for the pxa25x_udc compile on the Lubbock was
      satisfied by <linux/gpio.h> implicitly including
      <mach/gpio.h> which was in turn including <mach/irqs.h>,
      apart from the earlier added <mach/hardware.h>.
      
      Fix this by having the PXA25x <mach/lubbock.h> explicitly
      include <mach/irqs.h>.
      Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Cc: Greg Kroah-Hartmann <gregkh@linuxfoundation.org>
      Cc: Felipe Balbi <balbi@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      9928422f
  9. 28 12月, 2013 1 次提交
  10. 26 12月, 2013 5 次提交
  11. 20 12月, 2013 2 次提交
    • K
      stackprotector: Introduce CONFIG_CC_STACKPROTECTOR_STRONG · 8779657d
      Kees Cook 提交于
      This changes the stack protector config option into a choice of
      "None", "Regular", and "Strong":
      
         CONFIG_CC_STACKPROTECTOR_NONE
         CONFIG_CC_STACKPROTECTOR_REGULAR
         CONFIG_CC_STACKPROTECTOR_STRONG
      
      "Regular" means the old CONFIG_CC_STACKPROTECTOR=y option.
      
      "Strong" is a new mode introduced by this patch. With "Strong" the
      kernel is built with -fstack-protector-strong (available in
      gcc 4.9 and later). This option increases the coverage of the stack
      protector without the heavy performance hit of -fstack-protector-all.
      
      For reference, the stack protector options available in gcc are:
      
      -fstack-protector-all:
        Adds the stack-canary saving prefix and stack-canary checking
        suffix to _all_ function entry and exit. Results in substantial
        use of stack space for saving the canary for deep stack users
        (e.g. historically xfs), and measurable (though shockingly still
        low) performance hit due to all the saving/checking. Really not
        suitable for sane systems, and was entirely removed as an option
        from the kernel many years ago.
      
      -fstack-protector:
        Adds the canary save/check to functions that define an 8
        (--param=ssp-buffer-size=N, N=8 by default) or more byte local
        char array. Traditionally, stack overflows happened with
        string-based manipulations, so this was a way to find those
        functions. Very few total functions actually get the canary; no
        measurable performance or size overhead.
      
      -fstack-protector-strong
        Adds the canary for a wider set of functions, since it's not
        just those with strings that have ultimately been vulnerable to
        stack-busting. With this superset, more functions end up with a
        canary, but it still remains small compared to all functions
        with only a small change in performance. Based on the original
        design document, a function gets the canary when it contains any
        of:
      
          - local variable's address used as part of the right hand side
            of an assignment or function argument
          - local variable is an array (or union containing an array),
            regardless of array type or length
          - uses register local variables
      
        https://docs.google.com/a/google.com/document/d/1xXBH6rRZue4f296vGt9YQcuLVQHeE516stHwt8M9xyU
      
      Find below a comparison of "size" and "objdump" output when built with
      gcc-4.9 in three configurations:
      
        - defconfig
      	11430641 kernel text size
      	36110 function bodies
      
        - defconfig + CONFIG_CC_STACKPROTECTOR_REGULAR
      	11468490 kernel text size (+0.33%)
      	1015 of 36110 functions are stack-protected (2.81%)
      
        - defconfig + CONFIG_CC_STACKPROTECTOR_STRONG via this patch
      	11692790 kernel text size (+2.24%)
      	7401 of 36110 functions are stack-protected (20.5%)
      
      With -strong, ARM's compressed boot code now triggers stack
      protection, so a static guard was added. Since this is only used
      during decompression and was never used before, the exposure
      here is very small. Once it switches to the full kernel, the
      stack guard is back to normal.
      
      Chrome OS has been using -fstack-protector-strong for its kernel
      builds for the last 8 months with no problems.
      Signed-off-by: NKees Cook <keescook@chromium.org>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-mips@linux-mips.org
      Cc: linux-arch@vger.kernel.org
      Link: http://lkml.kernel.org/r/1387481759-14535-3-git-send-email-keescook@chromium.org
      [ Improved the changelog and descriptions some more. ]
      Signed-off-by: NIngo Molnar <mingo@kernel.org>
      8779657d
    • K
      stackprotector: Unify the HAVE_CC_STACKPROTECTOR logic between architectures · 19952a92
      Kees Cook 提交于
      Instead of duplicating the CC_STACKPROTECTOR Kconfig and
      Makefile logic in each architecture, switch to using
      HAVE_CC_STACKPROTECTOR and keep everything in one place. This
      retains the x86-specific bug verification scripts.
      Signed-off-by: NKees Cook <keescook@chromium.org>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Stephen Rothwell <sfr@canb.auug.org.au>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-mips@linux-mips.org
      Cc: linux-arch@vger.kernel.org
      Link: http://lkml.kernel.org/r/1387481759-14535-2-git-send-email-keescook@chromium.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      19952a92
  12. 19 12月, 2013 3 次提交
  13. 18 12月, 2013 1 次提交
  14. 17 12月, 2013 1 次提交
  15. 14 12月, 2013 2 次提交
    • T
      ARM: s3c64xx: dt: Fix boot failure due to double clock initialization · cb120572
      Tomasz Figa 提交于
      Commit
      
      4178bac4 ARM: call of_clk_init from default time_init handler
      
      added implicit call to of_clk_init() from default time_init callback,
      but it did not change platforms calling it from other callbacks, despite
      of not having custom time_init callbacks. This caused double clock
      initialization on such platforms, leading to boot failures. An example
      of such platform is mach-s3c64xx.
      
      This patch fixes boot failure on s3c64xx by dropping custom init_irq
      callback, which had a call to of_clk_init() and moving system reset
      initialization to init_machine callback. This allows us to have
      clocks initialized properly without a need to have custom init_time or
      init_irq callbacks.
      Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      cb120572
    • R
      ARM: fix asm/memory.h build error · b713aa0b
      Russell King 提交于
      Jason Gunthorpe reports a build failure when ARM_PATCH_PHYS_VIRT is
      not defined:
      
      In file included from arch/arm/include/asm/page.h:163:0,
                       from include/linux/mm_types.h:16,
                       from include/linux/sched.h:24,
                       from arch/arm/kernel/asm-offsets.c:13:
      arch/arm/include/asm/memory.h: In function '__virt_to_phys':
      arch/arm/include/asm/memory.h:244:40: error: 'PHYS_OFFSET' undeclared (first use in this function)
      arch/arm/include/asm/memory.h:244:40: note: each undeclared identifier is reported only once for each function it appears in
      arch/arm/include/asm/memory.h: In function '__phys_to_virt':
      arch/arm/include/asm/memory.h:249:13: error: 'PHYS_OFFSET' undeclared (first use in this function)
      
      Fixes: ca5a45c0 ("ARM: mm: use phys_addr_t appropriately in p2v and v2p conversions")
      Tested-By: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b713aa0b
  16. 12 12月, 2013 6 次提交
    • M
      ARM: sun6i: dt: Fix interrupt trigger types · 6f97dc8d
      Maxime Ripard 提交于
      The Allwinner A31 uses the ARM GIC as its internal interrupts controller. The
      GIC can work on several interrupt triggers, and the A31 was actually setting it
      up to use a rising edge as a trigger, while it was actually a level high
      trigger, leading to some interrupts that would be completely ignored if the
      edge was missed.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Acked-by: NHans de Goede <hdegoede@redhat.com>
      Cc: stable@vger.kernel.org # 3.12+
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      6f97dc8d
    • M
      ARM: sun7i: dt: Fix interrupt trigger types · 378d0aee
      Maxime Ripard 提交于
      The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The
      GIC can work on several interrupt triggers, and the A20 was actually setting it
      up to use a rising edge as a trigger, while it was actually a level high
      trigger, leading to some interrupts that would be completely ignored if the
      edge was missed.
      Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Acked-by: NHans de Goede <hdegoede@redhat.com>
      Cc: stable@vger.kernel.org #3.12+
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      378d0aee
    • S
      ARM: tegra: add missing break to fuse initialization code · b988ba1b
      Stephen Warren 提交于
      Add a missing break to the switch in tegra_init_fuse() which determines
      which SoC the code is running on. This prevents the Tegra30+ fuse
      handling code from running on Tegra20.
      
      Fixes: 3bd1ae57 ("ARM: tegra: add fuses as device randomness")
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      b988ba1b
    • S
      ARM: pxa: prevent PXA270 occasional reboot freezes · ff88b472
      Sergei Ianovich 提交于
      Erratum 71 of PXA270M Processor Family Specification Update
      (April 19, 2010) explains that watchdog reset time is just
      8us insead of 10ms in EMTS.
      
      If SDRAM is not reset, it causes memory bus congestion and
      the device hangs. We put SDRAM in selfresh mode before watchdog
      reset, removing potential freezes.
      
      Without this patch PXA270-based ICP DAS LP-8x4x hangs after up to 40
      reboots. With this patch it has successfully rebooted 500 times.
      Signed-off-by: NSergei Ianovich <ynvich@gmail.com>
      Tested-by: NMarek Vasut <marex@denx.de>
      Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      ff88b472
    • D
      ARM: pxa: tosa: fix keys mapping · 506cac15
      Dmitry Eremin-Solenikov 提交于
      When converting from tosa-keyboard driver to matrix keyboard, tosa keys
      received extra 1 column shift. Replace that with correct values to make
      keyboard work again.
      
      Fixes: f69a6548 ('[ARM] pxa/tosa: make use of the matrix keypad driver')
      Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
      Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      506cac15
    • I
      arm: xen: foreign mapping PTEs are special. · a7892f32
      Ian Campbell 提交于
      These mappings are in fact special and require special handling in privcmd,
      which already exists. Failure to mark the PTE as special on arm64 causes all
      sorts of bad PTE fun. e.g.
      
      e.g.:
      
      BUG: Bad page map in process xl  pte:e0004077b33f53 pmd:4079575003
      page:ffffffbce1a2f328 count:1 mapcount:-1 mapping:          (null) index:0x0
      page flags: 0x4000000000000014(referenced|dirty)
      addr:0000007fb5259000 vm_flags:040644fa anon_vma:          (null) mapping:ffffffc03a6fda58 index:0
      vma->vm_ops->fault: privcmd_fault+0x0/0x38
      vma->vm_file->f_op->mmap: privcmd_mmap+0x0/0x2c
      CPU: 0 PID: 2657 Comm: xl Not tainted 3.12.0+ #102
      Call trace:
      [<ffffffc0000880f8>] dump_backtrace+0x0/0x12c
      [<ffffffc000088238>] show_stack+0x14/0x1c
      [<ffffffc0004b67e0>] dump_stack+0x70/0x90
      [<ffffffc000125690>] print_bad_pte+0x12c/0x1bc
      [<ffffffc0001268f4>] unmap_single_vma+0x4cc/0x700
      [<ffffffc0001273b4>] unmap_vmas+0x68/0xb4
      [<ffffffc00012c050>] unmap_region+0xcc/0x1d4
      [<ffffffc00012df20>] do_munmap+0x218/0x314
      [<ffffffc00012e060>] vm_munmap+0x44/0x64
      [<ffffffc00012ed78>] SyS_munmap+0x24/0x34
      
      Where unmap_single_vma contains inlined -> unmap_page_range -> zap_pud_range
      -> zap_pmd_range -> zap_pte_range -> print_bad_pte.
      
      Or:
      
      BUG: Bad page state in process xl  pfn:4077b4d
      page:ffffffbce1a2f8d8 count:0 mapcount:-1 mapping:          (null) index:0x0
      page flags: 0x4000000000000014(referenced|dirty)
      Modules linked in:
      CPU: 0 PID: 2657 Comm: xl Tainted: G    B        3.12.0+ #102
      Call trace:
      [<ffffffc0000880f8>] dump_backtrace+0x0/0x12c
      [<ffffffc000088238>] show_stack+0x14/0x1c
      [<ffffffc0004b67e0>] dump_stack+0x70/0x90
      [<ffffffc00010f798>] bad_page+0xc4/0x110
      [<ffffffc00010f8b4>] free_pages_prepare+0xd0/0xd8
      [<ffffffc000110e94>] free_hot_cold_page+0x28/0x178
      [<ffffffc000111460>] free_hot_cold_page_list+0x38/0x60
      [<ffffffc000114cf0>] release_pages+0x190/0x1dc
      [<ffffffc00012c0e0>] unmap_region+0x15c/0x1d4
      [<ffffffc00012df20>] do_munmap+0x218/0x314
      [<ffffffc00012e060>] vm_munmap+0x44/0x64
      [<ffffffc00012ed78>] SyS_munmap+0x24/0x34
      
      x86 already gets this correct. 32-bit arm gets away with this because there is
      not PTE_SPECIAL bit in the PTE there and the vm_normal_page fallback path does
      the right thing.
      Signed-off-by: NIan Campbell <ian.campbell@citrix.com>
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      a7892f32
  17. 11 12月, 2013 3 次提交