Currently msm_set_baud_rate() assumes the uart clock rate is
1.8432 MHz. This is not always true, and limits our options to
program the baud rate. Instead of assuming the rate and
hard-coding the baud_code based on it, calculate the divider that
we want and try to find the closest baud_code that matches. This
allows us to support uarts with faster clock speeds.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

UARTDM serial devices require us to wait for the entire TX fifo
to drain before we can change the contents of the NCF_TX
register. Furthermore, if we write any characters to the TX fifo
within the same clock cycle of changing the NCF_TX register the
NCF_TX register won't latch properly.

To fix these issues we should read back the NCF_TX register to
delay any TX fifo accesses by a clock cycle and we should wait
for the TX fifo to drain (instead of just waiting for the fifo to
be ready to receive more characters). Failure to do so leads to
random NUL bytes interspersed in the output.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

remove invalid location line in each file header after location
moved from driver/char to driver/tty
Signed-off-by: NJovi Zhang <bookjovi@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The serial drivers are really just tty drivers, so move them to
drivers/tty/ to make things a bit neater overall.

This is part of the tty/serial driver movement proceedure as proposed by
Arnd Bergmann and approved by everyone involved a number of months ago.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rogier Wolff <R.E.Wolff@bitwizard.nl>
Cc: Michael H. Warfield <mhw@wittsend.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Set the mnd counter based on uartclk. This fixes a problem
on 7x30 where the uartclk is 19.2Mhz rather than the usual
4.8Mhz.

Trout incorrectly reports uartclk to be running at 19.2Mhz
It is actually running at 4.8Mhz.  For trout force mnd
counter values as if uartclk was fed by tcxo/4.
Signed-off-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
[dwalker@codeaurora.org: inlined, moved into header, added comments.]
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Signed-off-by: NBrian Swetland <swetland@google.com>
Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>