This patch adds the devicetree documentation for the ADI AXI-SPDIF audio
controller. The controller has:
 * One set of memory mapped register
 * Two clocks, one for the memory mapped register interface, one used as the
   audio reference clock
 * A DMA interface for the transmit data
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: NMark Brown <broonie@linaro.org>

This patch adds the devicetree documentation for the ADI AXI-SPDIF audio
controller. The controller has:
 * One set of memory mapped register
 * Two clocks, one for the memory mapped register interface, one used as the
   audio reference clock
 * One DMA interface each for the transmit and receive data
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: NMark Brown <broonie@linaro.org>

This was tested on a NETGEAR ReadyNAS 2120 device (Marvell Armada XP
based board, via DT).
Signed-off-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

Add device tree support to the DW watchdog timer.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Acked-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org

On CSR SiRFprimaII and SiRFatlasVI, the 6th timer can act as a watchdog
timer when the Watchdog mode is enabled.

watchdog occur when TIMER watchdog counter matches the value software
pre-set, when this event occurs, the effect is the same as the system
software reset.
Signed-off-by: NXianglong Du <Xianglong.Du@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Cc: Romain Izard <romain.izard.pro@gmail.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

I accidently put the devicetree bindings for the MEN A21 watchdog driver in
Documentation/devicetree/bindings/gpio instead of
Documentation/devicetree/bindings/watchdog, this patch addresses this error.
Signed-off-by: NJohannes Thumshirn <johannes.thumshirn@men.de>
Acked-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Rob Landley <rob@landley.net>

Add a driver for the watchdog timer found on Ralink SoC
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
Cc: linux-watchdog@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org

This patch adds a watchdog driver for the main hardware watchdog timer
found on MOXA ART SoCs.

The MOXA ART SoC provides one writable timer register, restarting
the hardware once it reaches zero. The register is auto decremented
every APB clock cycle.
Signed-off-by: NJonas Jensen <jonas.jensen@gmail.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Introduce support for Broadcom Serial Controller (BSC) I2C bus found
in the Kona family of Mobile SoCs.  FIFO hardware is utilized but only
standard mode (100kHz), fast mode (400kHz), fast mode plus (1MHz), and
I2C high-speed (3.4 MHz) bus speeds are supported.
Signed-off-by: NTim Kryger <tim.kryger@linaro.org>
Reviewed-by: NMatt Porter <matt.porter@linaro.org>
Reviewed-by: NMarkus Mayer <markus.mayer@linaro.org>
[wsa: fixed Kconfig sorting, squashed broken out patches into one]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add documentation for the generic OMAP DES crypto modul describing the device
tree bindings.
Reviewed-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NJoel Fernandes <joelf@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

A new compatible property "ti,omap5-sham" is added to the omap-sham driver
recently to support SHA/MD5 for OMAP5,DRA7 and AM43XX. Documenting the
same.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add OF document for LM90 in Documentation/devicetree/.

[JD: Add this new file to the LM90 MAINTAINERS entry.]
Signed-off-by: NWei Ni <wni@nvidia.com>
Signed-off-by: NJean Delvare <khali@linux-fr.org>

Correct the SPI node compatible property items to match example code and
match current DTS usage.
Signed-off-by: NEric Witcher <ewitcher@mindspring.com>
Acked-by: NSourav Poddar <sourav.poddar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds support to SSC (Synchronous Serial Controller)
I2C driver. This IP also supports SPI protocol, but this is not
the aim of this driver.

This IP is embedded in all ST SoCs for Set-top box platorms, and
supports I2C Standard and Fast modes.
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.
Signed-off-by: NHongbo Zhang <hongbo.zhang@freescale.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
also fixes some defects of indent for text alignment at the same time.
Signed-off-by: NHongbo Zhang <hongbo.zhang@freescale.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

This allows the charger to be enabled with devicetree, and allows the
parameters for charging the backup battery to be set.
Signed-off-by: NNeilBrown <neilb@suse.de>
Acked-by: NKumar Gala <galak@codeaurora.org>
Acked-by: NGrant Likely <grant.likely@linaro.org>
Signed-off-by: NAnton Vorontsov <anton@enomsg.org>

LP8555 is one of the LP855x family devices.

This device needs pre_init_device() and post_init_device() driver
structure.  It's same as LP8557, so the device configuration code is
shared with LP8557.  Backlight outputs are generated from dual DC-DC boost
converters.  It's configurable EPROM settings which are defined in the
platform data.

Driver documentation and device tree bindings are updated.
Signed-off-by: NMilo Kim <milo.kim@ti.com>
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NMischa Jonker <mjonker@synopsys.com>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>

Updated the number of LDOs and BUCKs as per the user manual.
Fixed trivial typos to improve readability.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Updated supported SoC name for pwm-samsung.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

There was a spelling mistake on TSC/ADC binding where "coordinate" was
spelled as "coordiante".

We can't simply fix the error due to DT being an ABI, the approach taken
was to first use correct spelling and if that fails, fall back to
miss-spelled version.

It's unfortunate that has creeped into the tree.
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
	1-bit hamming ecc code using software library
- OMAP_ECC_HAMMING_CODE_HW
	1-bit hamming ecc-code using GPMC h/w engine
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE
	1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible
	to ROM code.

This patch combines above multiple ecc-schemes into single implementation:
- OMAP_ECC_HAM1_CODE_HW
	1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible
	ecc-layout.
Signed-off-by: NPekon Gupta <pekon@ti.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

OMAP NAND driver support multiple ECC scheme, which can used in different
flavours, depending on in-build Hardware engines present on SoC.

This patch updates following in DT bindings related to sectionion of ecc-schemes
- ti,elm-id: replaces elm_id (maintains backward compatibility)
- ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme
	depends on ti,elm-id. (supported values ham1, bch4, and bch8)
- maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode)

Below table shows different flavours of ecc-schemes supported by OMAP devices
+---------------------------------------+---------------+---------------+
| ECC scheme                            |ECC calculation|Error detection|
+---------------------------------------+---------------+---------------+
|OMAP_ECC_HAM1_CODE_HW                  |H/W (GPMC)     |S/W            |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW     |H/W (GPMC)     |S/W            |
|(requires CONFIG_MTD_NAND_ECC_BCH)     |               |               |
+---------------------------------------+---------------+---------------+
|OMAP_ECC_BCH8_CODE_HW                  |H/W (GPMC)     |H/W (ELM)      |
|(requires CONFIG_MTD_NAND_OMAP_BCH &&  |               |               |
| ti,elm-id in DT)                      |               |               |
+---------------------------------------+---------------+---------------+

To optimize footprint of omap2-nand driver, selection of some ECC schemes
also require enabling following Kconfigs, in addition to setting appropriate
DT bindings
- Kconfig:CONFIG_MTD_NAND_ECC_BCH        error detection done in software
- Kconfig:CONFIG_MTD_NAND_OMAP_BCH       error detection done by h/w engine
Signed-off-by: NPekon Gupta <pekon@ti.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The DDR controller is slightly different in ECX-2000 and ECX-1000, so we
need to have different nodes for each platform.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
[Device Tree documentation updated.]
Signed-off-by: NRobert Richter <rric@kernel.org>

This patch adds support for the clocks provided by the Clock Management
Unit of Energy Micro's efm32 Giant Gecko SoCs including device tree
bindings.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Use "panasonic" as the vendor prefix for the Panasonic Corporation.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Chunghwa Picture Tubes Ltd. isn't listed on the stock exchange, so use
the generic "chunghwa" as vendor prefix.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

AU Optronics is listed as AUO on the stock exchange, so use that as the
vendor prefix.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Adds PHYTEC to the list of DT vendor prefixes.
Signed-off-by: NMatt Porter <matt.porter@linaro.org>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Signed-off-by: NSilvio F <silvio.fricke@gmail.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Drivers like clocksource/cadence_ttc and net/macb already use the 'cdns'
prefix for Cadence IP.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Adds support for High Speed I2C driver found in Exynos5 and
later SoCs from Samsung.

Driver only supports Device Tree method.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NTaekgyun Ko <taeggyun.ko@samsung.com>
Reviewed-by: NSimon Glass <sjg@google.com>
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: NAndrew Bresticker <abrestic@google.com>
[wsa: rebased to v3.12-rc4 (no of_i2c.h anymore)]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch adds support to ST RC driver, which is basically a IR/UHF
receiver and transmitter. This IP (IRB) is common across all the ST
parts for settop box platforms. IRB is embedded in ST COMMS IP block.
It supports both Rx & Tx functionality.
This driver adds only Rx functionality via LIRC codec.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: NSean Young <sean@mess.org>
Signed-off-by: NMauro Carvalho Chehab <m.chehab@samsung.com>

Add the AM33xx RNG module's device tree data.
Also add Documentation file describing the data
for the RNG module.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

imx27 pincontrol driver using the imx1 core driver. The DT bindings are
similar to other imx pincontrol drivers.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The standard interrupts property in device tree can only handle
interrupts coming from a single interrupt parent. If a device is wired
to multiple interrupt controllers, then it needs to be attached to a
node with an interrupt-map property to demux the interrupt specifiers
which is confusing. It would be a lot easier if there was a form of the
interrupts property that allows for a separate interrupt phandle for
each interrupt specifier.

This patch does exactly that by creating a new interrupts-extended
property which reuses the phandle+arguments pattern used by GPIOs and
other core bindings.
Signed-off-by: NGrant Likely <grant.likely@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NKumar Gala <galak@codeaurora.org>
[grant.likely: removed versatile platform hunks into separate patch]
Cc: Rob Herring <rob.herring@calxeda.com>

Adds support for the bq24735 charger chipset. The bq24735 is a
high-efficiency, synchronous battery charger.

It allows control of the charging current, input current, and the charger
voltage DAC's through SMBus.
Signed-off-by: NDarbha Sriharsha <dsriharsha@nvidia.com>
Signed-off-by: NRhyland Klein <rklein@nvidia.com>
Thanks-to: Stephen Warren <swarren@wwwdotorg.org>
Thanks-to: Thierry Reding <thierry.reding@gmail.com>
Thanks-to: Manish Badarkhe <badarkhe.manish@gmail.com>
Signed-off-by: NAnton Vorontsov <anton@enomsg.org>

The GPIO driver for the Abilis Systems TB10x series of SOCs based on ARC700
CPUs. It supports GPIO control and GPIO interrupt generation. This driver
works in conjunction with the TB10x pinctrl driver.
Signed-off-by: NSascha Leuenberger <sascha.leuenberger@abilis.com>
Signed-off-by: NChristian Ruppert <christian.ruppert@abilis.com>
Acked-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch moves the handling of the chip's enable pin from the board
code into the driver. It also updates all board-code files using the
driver to incorporate this change.

This is needed for device tree support of the enable pin.
Signed-off-by: NSebastian Reichel <sre@debian.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NBryan Wu <cooloney@gmail.com>