1. 03 10月, 2014 2 次提交
  2. 30 9月, 2014 5 次提交
  3. 28 9月, 2014 2 次提交
  4. 26 9月, 2014 2 次提交
  5. 24 9月, 2014 2 次提交
  6. 23 9月, 2014 3 次提交
  7. 22 9月, 2014 2 次提交
  8. 19 9月, 2014 1 次提交
  9. 14 9月, 2014 2 次提交
  10. 12 9月, 2014 1 次提交
  11. 11 9月, 2014 1 次提交
    • T
      ALSA: hda - Fix invalid pin powermap without jack detection · 7a9744cb
      Takashi Iwai 提交于
      When a driver is set up without the jack detection explicitly (either
      by passing a model option or via a specific fixup), the pin powermap
      of IDT/STAC codecs is set up wrongly, resulting in the silence
      output.  It's because of a logic failure in stac_init_power_map().
      It tries to avoid creating a callback for the pins that have other
      auto-hp and auto-mic callbacks, but the check is done in a wrong way
      at a wrong time.  The stac_init_power_map() should be called after
      creating other jack detection ctls, and the jack callback should be
      created only for jack-detectable widgets.
      
      This patch fixes the check in stac_init_power_map() and its callee
      at the right place, after snd_hda_gen_build_controls().
      Reported-by: NAdam Richter <adam_richter2004@yahoo.com>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      7a9744cb
  12. 10 9月, 2014 2 次提交
  13. 09 9月, 2014 1 次提交
  14. 06 9月, 2014 4 次提交
  15. 04 9月, 2014 1 次提交
    • P
      ASoC: davinci-mcasp: Correct rx format unit configuration · fe0a29e1
      Peter Ujfalusi 提交于
      In case of capture we should not use rotation. The reverse and mask is
      enough to get the data align correctly from the bus to MCU:
      Format	  data from bus    after reverse (XRBUF)
      S16_LE:  |LSB|MSB|xxx|xxx|  |xxx|xxx|MSB|LSB|
      S24_3LE: |LSB|DAT|MSB|xxx|  |xxx|MSB|DAT|LSB|
      S24_LE:  |LSB|DAT|MSB|xxx|  |xxx|MSB|DAT|LSB|
      S32_LE:  |LSB|DAT|DAT|MSB|  |MSB|DAT|DAT|LSB|
      
      With this patch all supported formats will work for playback and capture.
      
      Reported-by: Jyri Sarha <jsarha@ti.com> (broken S24_3LE capture)
      Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Cc: stable@vger.kernel.org
      fe0a29e1
  16. 03 9月, 2014 2 次提交
    • J
      ASoC: max98090: Add recovery for PLL lock failure · b8a3ee82
      Jarkko Nikula 提交于
      All MAX98090 input clocks MCLK, LRCLK and BCLK must be running and stable
      before powering on the codec in slave mode. Otherwise the PLL may not lock
      to LRCLK causing silence in playback and capture. How often that happens is
      somewhat hardware and clock configuration specific.
      
      Now if wanting to follow strictly this clocks must be active before
      powering the codec on requirement we should have a notification from DAI
      driver to codec driver when clocks are activated and take codec out of
      shutdown only after that. Plus take care of possible active bypass paths.
      
      However, when PLL unlock occurs, MAX98090 asserts the PLL Unlock Flag which
      can be configured as an IRQ source. This allows to workaround around the
      issue by toggling the codec power shortly in case of PLL lock failure.
      
      In order to prevent needlessly toggling codec power in case of short PLL
      unlocks at the beginning of stream this patch implements delayed activation
      for PLL unlock interrupt. Then workaround is run only when the PLL doesn't
      lock at all.
      
      Power toggling workaround for PLL unlock comes originally from
      Liam Girdwood <liam.r.girdwood@linux.intel.com> and delayed activation from
      me.
      Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      b8a3ee82
    • J
      ASoC: tlv320aic31xx: Fix 24bit samples with I2S format and 12MHz mclk · 03be88ee
      Jyri Sarha 提交于
      I2S format requires bitclock to have an exact amount of cycles in a
      frame for audio to work cleanly. With dsp formats that is not so
      important.
      
      Updates aic31xx_setup_pll() to look for a line in aic31xx_divs table
      that produces the best match for the bitclock and adds lines to
      aic31xx_divs for 12MHz mclk and 24bit samples.
      Signed-off-by: NJyri Sarha <jsarha@ti.com>
      Tested-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      03be88ee
  17. 02 9月, 2014 2 次提交
  18. 01 9月, 2014 1 次提交
  19. 29 8月, 2014 4 次提交