1. 06 10月, 2008 1 次提交
    • T
      ARM: OMAP2: Misc updates from linux-omap tree · 646e3ed1
      Tony Lindgren 提交于
      Misc updates from linux-omap tree, mostly to update common
      device initialization and add missing defines from linux-omap
      tree. Also some changes to make room for adding 34xx in
      following patches.
      
      Note that the I2C resources are now set up in
      arch/arm/plat-omap/i2c.c helper, and can be removed
      from devices.c.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      646e3ed1
  2. 19 8月, 2008 1 次提交
  3. 07 8月, 2008 1 次提交
  4. 03 7月, 2008 2 次提交
    • P
      ARM: OMAP2: Clock: New OMAP2/3 DPLL rate rounding algorithm · 88b8ba90
      Paul Walmsley 提交于
      This patch adds a new rate rounding algorithm for DPLL clocks on the
      OMAP2/3 architecture.
      
      For a desired DPLL target rate, there may be several
      multiplier/divider (M, N) values which will generate a sufficiently
      close rate.  Lower N values result in greater power economy.  However,
      lower N values can cause the difference between the rounded rate and
      the target rate ("rate error") to be larger than it would be with a
      higher N.  This can cause downstream devices to run more slowly than
      they otherwise would.
      
      This DPLL rate rounding algorithm:
      
      - attempts to find the lowest possible N (DPLL divider) to reach the
        target_rate (since, according to Richard Woodruff <r-woodruff@ti.com>,
        lower N values save more power than higher N values).
      
      - allows developers to set an upper bound on the error between the
        rounded rate and the desired target rate ("rate tolerance"), so an
        appropriate balance between rate fidelity and power savings can be
        set.  This maximum rate error tolerance is set via
        omap2_set_dpll_rate_tolerance().
      
      - never returns a rounded rate higher than the target rate.
      
      The rate rounding algorithm caches the last rounded M, N, and rate
      computation to avoid rounding the rate twice for each clk_set_rate()
      call.  (This patch does not yet implement set_rate for DPLLs; that
      follows in a future patch.)
      
      The algorithm trades execution speed for rate accuracy.  It will find
      the (M, N) set that results in the least rate error, within a
      specified rate tolerance.  It does this by evaluating each divider
      setting - on OMAP3, this involves 128 steps.  Another approach to DPLL
      rate rounding would be to bail out as soon as a valid rate is found
      within the rate tolerance, which would trade rate accuracy for
      execution speed.  Alternate implementations welcome.
      
      This code is not yet used by the OMAP24XX DPLL clock, since it
      is currently defined as a composite clock, fusing the DPLL M,N and the
      M2 output divider.  This patch also renames the existing OMAP24xx DPLL
      programming functions to highlight that they program both the DPLL and
      the DPLL's output multiplier.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      88b8ba90
    • T
      ARM: OMAP: Turn CM and PRM access into functions · ff00fcc9
      Tony Lindgren 提交于
      Otherwise compiling in omap2 and omap3 will not work.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      ff00fcc9
  5. 15 4月, 2008 3 次提交
  6. 21 5月, 2007 1 次提交
  7. 07 3月, 2007 1 次提交
  8. 25 9月, 2006 2 次提交
  9. 27 6月, 2006 1 次提交
  10. 03 4月, 2006 1 次提交
  11. 18 1月, 2006 1 次提交
  12. 10 11月, 2005 1 次提交