Skip to content

R
raspberrypi-kernel

openeuler / raspberrypi-kernel

通知 14
Star 1
Fork 0
R
raspberrypi-kernel
切换分支/标签
  1. 17 5月, 2018 1 次提交
  3. 11 5月, 2018 2 次提交
  5. 22 4月, 2017 1 次提交
    • V
      spi: spi-ti-qspi: Use bounce buffer if read buffer is not DMA'ble · c687c46e
      由 Vignesh R 提交于 
      Flash filesystems like JFFS2, UBIFS and MTD block layer can provide
vmalloc'd or kmap'd buffers that cannot be mapped using dma_map_sg() and
can potentially be in memory region above 32bit addressable region(ie
buffers belonging to memory region backed by LPAE) of DMA, implement
spi_flash_can_dma() interface to inform SPI core not to map such
buffers.
When buffers are not mapped for DMA, then use a pre allocated bounce
buffer(64K = typical flash erase sector size) to read from flash and
then do a copy to actual destination buffer. This is approach is much
faster than using memcpy using CPU and also reduces CPU load.

With this patch, UBIFS read speed is ~18MB/s and CPU utilization <20% on
DRA74 Rev H EVM. Performance degradation is negligible when compared
with non bounce buffer case while using UBIFS.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      c687c46e
  7. 27 3月, 2017 1 次提交
  9. 25 3月, 2017 1 次提交
  11. 20 2月, 2017 2 次提交
  13. 17 2月, 2017 1 次提交
  15. 16 11月, 2016 1 次提交
  17. 17 8月, 2016 1 次提交
  19. 26 6月, 2016 1 次提交
  21. 01 6月, 2016 1 次提交
  23. 13 4月, 2016 2 次提交
  25. 10 2月, 2016 1 次提交
    • V
      spi: spi-ti-qspi: add mmap mode read support · 4dea6c9b
      由 Vignesh R 提交于 
      ti-qspi controller provides mmap port to read data from SPI flashes.
mmap port is enabled in QSPI_SPI_SWITCH_REG. ctrl module register may
also need to be accessed for some SoCs. The QSPI_SPI_SETUP_REGx needs to
be populated with flash specific information like read opcode, read
mode(quad, dual, normal), address width and dummy bytes. Once,
controller is in mmap mode, the whole flash memory is available as a
memory region at SoC specific address. This region can be accessed using
normal memcpy() (or mem-to-mem dma copy). The ti-qspi controller hardware
will internally communicate with SPI flash over SPI bus and get the
requested data.

Implement spi_flash_read() callback to support mmap read over SPI
flash devices. With this, the read throughput increases from ~100kB/s to
~2.5 MB/s.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      4dea6c9b
  27. 30 10月, 2015 1 次提交
  29. 17 10月, 2015 1 次提交
    • V
      spi: spi-ti-qspi: switch to polling mode for better r/w performance · 57c2ecd9
      由 Vignesh R 提交于 
      Currently word completion interrupt is fired for transfer of every
word(8bit to 128bit in size). This adds a lot of overhead, and decreases
r/w throughput. It hardly takes 3us(@48MHz) for 128bit r/w to complete,
hence its better to poll on word complete bit to be set in
QSPI_SPI_STATUS_REG instead of using interrupts.
This increases the throughput by 30% in both read and write case.

So, switch to polling mode instead of interrupts to determine completion
of word transfer.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      57c2ecd9
  31. 13 10月, 2015 1 次提交
    • V
      spi: ti-qspi: Fix data corruption seen on r/w stress test · bc27a539
      由 Vignesh R 提交于 
      Writing invalid command to QSPI_SPI_CMD_REG will terminate current
transfer and de-assert the chip select. This has to be done before
calling spi_finalize_current_message(). Because
spi_finalize_current_message() will mark the end of current message
transfer and schedule the next transfer. If the chipselect is not
de-asserted before calling spi_finalize_current_message() then the next
transfer will overlap with the previous transfer leading to data
corruption.
__spi_pump_message() can be called either from kthread worker context or
directly from the calling process's context. It is possible that these
two calls can race against each other. But race is serialized by
checking whether master->cur_msg == NULL (pointer to msg being handled
by transfer_one() at present). The master->cur_msg is set to NULL when
spi_finalize_current_message() is called on that message, which means
calling spi_finalize_current_message() allows __spi_sync() to pump next
message in calling process context.
Now if spi-ti-qspi calls spi_finalize_current_message() before we
terminate transfer at hardware side, if __spi_pump_message() is called
from process context then the successive transactions can overlap.

Fix this by moving writing invalid command to QSPI_SPI_CMD_REG to
before calling spi_finalize_current_message() call.

Cc: stable@vger.kernel.org # v3.12+
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      bc27a539
  33. 21 8月, 2015 1 次提交
    • V
      spi: ti-qspi: use 128 bit transfer mode where possible · f682c4ff
      由 Vignesh R 提交于 
      TI QSPI has four 32 bit data regsiters which can be used to transfer 16
bytes of data at once. The register group QSPI_SPI_DATA_REG_3,
QSPI_SPI_DATA_REG_2, QSPI_SPI_DATA_REG_1 and QSPI_SPI_DATA_REG is
treated as a single 128-bit word for shifting data in and out. The bit
at QSPI_SPI_DATA_REG_3[31] position is the first bit to be shifted out
in case of 128 bit transfer mode. Therefore the first byte to be written
to flash should be at QSPI_SPI_DATA_REG_3[31-25] position.
Instead of writing 1 byte at a time when interacting with spi-nor flash,
make use of all the four registers so that 16 bytes can be transferred
in one go. This reduces number of register writes and Word Complete
interrupts for a given transfer message size, thereby increasing the
write performance.

Without this patch the raw flash write speed is ~100KB/s, with this
patch the write speed increases to ~400 kB/s on DRA74 EVM.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      f682c4ff
  35. 21 2月, 2015 1 次提交
  37. 06 2月, 2015 1 次提交
  39. 20 10月, 2014 1 次提交
  41. 10 3月, 2014 1 次提交
  43. 16 2月, 2014 1 次提交
  45. 07 2月, 2014 1 次提交
  47. 13 1月, 2014 2 次提交
  49. 07 1月, 2014 1 次提交
  51. 31 12月, 2013 1 次提交
  53. 19 12月, 2013 1 次提交
  55. 24 11月, 2013 3 次提交
  57. 07 10月, 2013 1 次提交
  59. 26 9月, 2013 2 次提交
  61. 01 9月, 2013 1 次提交
  63. 27 8月, 2013 2 次提交