Several of the options in bcm_defconfig have gotten out of date so
regenerate it with "make savedefconfig" to keep things fresh.
Signed-off-by: NTim Kryger <tim.kryger@linaro.org>
Reviewed-by: NMatt Porter <matt.porter@linaro.org>

Add HAVE_ARM_ARCH_TIMER to Broadcom Kconfig as it is
required for some Mobile SoCs.
Signed-off-by: NChristian Daudt <bcm@fixthebug.org>
Reviewed-by: NMarkus Mayer <mmayer@broadcom.com>
Reviewed-by: NMark Hambleton <mahamble@broadcom.com>
Reviewed-by: NJames King <jamesk@broadcom.com>

Currently ARCH_BCM has been used for Broadcom
Mobile V7 based SoCs. In order to allow other Broadcom
SoCs to also use mach-bcm directory and files, this patch
renames the original ARCH_BCM to ARCH_BCM_MOBILE, and
uses ARCH_BCM to define any Broadcom chip residing
in mach-bcm directory.
Signed-off-by: NChristian Daudt <bcm@fixthebug.org>
Acked-by: NOlof Johansson <olof@lixom.net>

Changes from v2:
 - switch ARCH_MULTIPLATFORM from select to depends
 - remove 'default y' from BCM_MOBILE

Changes from v1:
 - fix alpha ordering in dts/Makefile
 - break into 4 patches for separate subsys

This patch enables all drivers and alike to make defconfig-ed
kernels use Versatile Express specific features, like power
management services (PSCI, MCPM with drivers for DCCSB on
Fast Models and SPC on TC2), CMA for frame buffer allocation,
all virtio device drivers (for QEMU, KVM tools and Fast Models),
MTD physmap drivers with squashfs and UBIFS for flash,
I2C master, regulator and hwmon drivers and LEDs support with
most useful triggers. The maximum amount of CPUs has been
increased to 8 to facilitate big.Little systems.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch updates the Versatile Express defconfig to a level
which makes it possible to run a defconfig-ed kernel work
on the board and in QEMU with modern userspace. It does:

- update cmdline to contain "console=ttyAMA0" only
- enable devtmpfs filesystem
- enable voltage regulator support
- enable ext4 filesystem
- disable low level debug and early printk
Signed-off-by: NFathi Boudra <fathi.boudra@linaro.org>
[PM: removed DEBUG_LL - it doesn't work on qemu]
[PM: reworded the commit message]
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The machine entries were split up, but the cleanup to remove .init_time
removed the function that the new/split entries refer to. Remove them
since they are no longer needed.

Cc: Maxime Ripard <mripard@free-electrons.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The imx6sl low power mode implementation inherits imx6q/dl one,
and pm-imx6q.c can just work for imx6sl with some minor updates.
Let's enable imx6sl suspend support by reusing pm-imx6q.c and use
cpu_is_imxXX() to handle the those minor differences between imx6sl
and imx6q/dl.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

There is a defect in imx6 LPM design.  When SW tries to enter low power
mode with following sequence, the chip will enter low power mode before
A9 CPU execute WFI instruction:

1. Set CCM_CLPCR[1:0] to 2'b00;
2. ARM CPU enters WFI;
3. ARM CPU wakeup from an interrupt event, which is masked by GPC or not
   visible to GPC, such as interrupt from local timer;
4. Set CCM_CLPCR[1:0] to 2'b01 or 2'b10;
5. ARM CPU execute WFI.

Before the last step, the chip will enter WAIT mode if CCM_CLPCR[1:0] is
set to 2'b01, or enter STOP mode if CCM_CLPCR[1:0] is set to 2'b10.

The patch implements a recommended workaround for this issue.

1. SW triggers irq #32(IOMUX) to be always pending manually by setting
   IOMUX_GPR1_GINT bit;
2. SW should then unmask it in GPC before setting CCM LPM;
3. SW should mask it right after CCM LPM is set (bit0-1 of CCM_CLPCR).
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The WB and RBC configuration calls are currently made from
imx6q_set_lpm() for WAIT_CLOCKED and WAIT_UNCLOCKED mode with a simple
state tracking.  This becomes unnecessary since we can make the calls
from imx6q_pm_enter() directly now for suspend.

More importantly, the current call of imx6q_enable_wb() from
imx6q_set_lpm() is buggy.  The CLPCR register bits configured by
imx6q_enable_wb() will get lost, because imx6q_set_lpm() caches the same
register and write it back at the end of the function.  That's why the
imx6dl suspend/resume does not work currently - the wakeup from suspend
triggers a reset on imx6dl.

Moves the WB and RBC calls into imx6q_pm_enter() to save the state
tracking and fixes above bug, so that suspend/resume can start working
on imx6dl.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The LPM (Low Power Mode) code that currently sits in imx6q clock driver
will be reused by imx6sl.  Let's move it into pm-imx6q.c, so that we
can keep clock driver SoC specific and reuse pm-imx6q.c on imx6sl.

In order to avoid adding another ioremap for CCM block,
imx6q_pm_set_ccm_base() is created to let clock driver set up ccm_base
for pm code.

During the move, the unused CCGR macros get removed.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Since commit 70dc8a48 (checkpatch: warn when using extern with function
prototypes in .h files), we will get checkpatch warning when updating
common.h following the existing convention which has extern for function
prototypes.

Let's change the convention to not use extern with function prototypes
in this header.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

From hotplug stress test result, resetting core during enable/disable
operation can improve cpu hotplug stability.  So let's set
SRC reset bit in imx_enable_cpu() for the core when its enable bit is
accessed.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

When imx_cpu_die() is being called, the cpu should never return from the
call but just in WFI and wait for hardware to take it down.  So let's
do cpu_do_idle() repeatly in the call.  Doing this help improve the
relibility of hotplug operation.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This is very useful for detecting 'circular locking dependency' issues.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Having CONFIG_DEBUG_GPIO=y leads to several debug messages polluting kernel log:

[    0.580325] of_get_named_gpio_flags: can't parse gpios property of node '/regulators/3p3v[0]'
[    0.581185] 3P3V: 3300 mV
[    0.584827] of_get_named_gpio_flags exited with status 124
[    0.585852] vddio-sd0: 3300 mV
[    0.590023] of_get_named_gpio_flags exited with status 79
[    0.590770] fec-3v3: 3300 mV
[    0.594805] of_get_named_gpio_flags exited with status 105
[    0.595491] usb0_vbus: 5000 mV
[    0.599687] of_get_named_gpio_flags exited with status 104
[    0.600380] usb1_vbus: 5000 mV
[    0.604463] of_get_named_gpio_flags exited with status 126
[    0.605153] lcd-3v3: 3300 mV
[    0.608970] of_get_named_gpio_flags exited with status 77

Turn this option off, as these messages are not really useful for normal usage.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The imx6q_restart() works fine with normal reboot but will run into
problem with emergency reboot like sysrq-b.  In that case, of_iomap()
gets called from interrupt context and hence triggers the BUG_ON in
__get_vm_area_node().

Actually, since commit c1e31d12 (ARM: imx: create
mxc_arch_reset_init_dt() for DT boot), imx6q/dl should try to use
mxc_restart() by calling mxc_arch_reset_init_dt() beforehand, where
things like of_iomap() can be done.

The patch updates mxc_restart() a little bit to get it work for imx6q/dl
and kill imx6q_restart() completely.
Reported-by: NNathan Lynch <nathan_lynch@mentor.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

As mx53 is a dt-only SoC, we should retrieve the iomuxc base address from the
device tree, instead of using the old MX53_IO_ADDRESS method.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

As mx53 is a dt-only SoC, we should retrieve the tzic base address from the
device tree, instead of using the old MX53_IO_ADDRESS method.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

As mx53 is a dt-only SoC, we should retrieve the gpt base address and irq
from the device tree, instead of using the old MX53_IO_ADDRESS method.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Generated by doing:

make mxs_defconfig
Manually selected the CHIPIDEA_UDC driver
make savedefconfig
cp defconfig arch/arm/configs/mxs_defconfig
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The IS_ERR() macro is defined in the linux/err.h header file, so include
it explicitly.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Generated by doing:

make imx_v6_v7_defconfig
Manually selected the CHIPIDEA_UDC driver
make savedefconfig
cp defconfig arch/arm/configs/imx_v6_v7_defconfig
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Generated by doing:

make imx_v6_v7_defconfig
Manually selected the IMX_SPDIF driver
make savedefconfig
cp defconfig arch/arm/configs/imx_v6_v7_defconfig
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Update imx6q clock initialization and Kconfig for PCIe support.
Signed-off-by: NSean Cross <xobs@kosagi.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The i.MX6 has two general-purpose LVDS clocks that can be driven
from a variety of sources.  This patch adds a mux and a gate for
both of these clocks.
Signed-off-by: NSean Cross <xobs@kosagi.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The mx53_display_revision() declaration in common.h is stale and used
nowhere, so remove it.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The patch enables soc bus infrastructure and adds a function
imx_soc_device_init() to report soc info via soc device interface for
imx6qdl and imx6sl.  With the support, user space can get soc related
info by looking at sysfs like below.

  $ cat /sys/devices/soc0/machine
  Freescale i.MX6 Quad SABRE Smart Device Board
  $ cat /sys/devices/soc0/family
  Freescale i.MX
  $ cat /sys/devices/soc0/soc_id
  i.MX6Q
  $ cat /sys/devices/soc0/revision
  1.2
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add imx6sl support into imx_init_revision_from_anatop(), so that it can
be used to initialize cpu type and revision on imx6sl.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The patch creates a common function imx_init_revision_from_anatop() by
merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any
SoC that encodes revision info in anatop can use it to initialize
revision.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

It calls imx_set_soc_revision() to set up soc revision in
imx6q_init_revision(), and replaces all the occurrences of
imx6q_revision() with common helper imx_get_soc_revision().
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Similar to what we do for cpu type, the patch adds helper functions
imx_set_soc_revision() and imx_get_soc_revision() to maintain
imx_soc_revision in cpu.c.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add low-level debug support for vybrid, so that earlyprintk can be
enabled for debugging early boot issue.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This flag is a NOOP since 2.6.35 and can be removed.

This is an update for 3.11 of a patch already sent for 3.10
Signed-off-by: NMichael Opdenacker <michael.opdenacker@free-electrons.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Config iomux-gpr1 to select clock source for fec system clock.
Clear gpr1[14], gpr1[18-17] bit to select the fec clock source
from internal anatop PLL.
Signed-off-by: NFugang Duan <B38611@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

There's a pll4_audio_div clock, an extra divider for pll4, missing
in current clock tree, thus add it.
Signed-off-by: NNicolin Chen <b42378@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Extend the list of power gates found on Tegra114. Note that there are
now holes in the list, so perhaps a simple array is no longer the best
data structure to represent it.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

There's no need to modify these at runtime, it is static data and never
needs to change.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Instead of duplicating powergate defines, reuse the ones from the
include/linux/tegra-powergate.h header file.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The LP1 suspend procedure is the same with Tegra30 and Tegra114. Just
need to update the difference of the register address, then we can
continue to share the code.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>