- 07 3月, 2013 29 次提交
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由 Marc Zyngier 提交于
It has little to do in emulate.c these days... Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
v8 is capable of invalidating Stage-2 by IPA, but v7 is not. Change kvm_tlb_flush_vmid() to take an IPA parameter, which is then ignored by the invalidation code (and nuke the whole TLB as it always did). This allows v8 to implement a more optimized strategy. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Since the arm64 code doesn't have a global asm/idmap.h file, move the inclusion to asm/kvm_mmu.h. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
The virtual GIC is supposed to be 4kB aligned. On a 64kB page system, comparing the alignment to PAGE_SIZE is wrong. Use SZ_4K instead. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
The ARM ARM says that HPFAR reports bits [39:12] of the faulting IPA, and we need to complement it with the bottom 12 bits of the faulting VA. This is always 12 bits, irrespective of the page size. Makes it clearer in the code. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
guest.c already contains some target-specific checks. Let's move kvm_target_cpu() over there so arm.c is mostly target agnostic. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
__create_hyp_mappings() performs some kind of address validation before creating the mapping, by verifying that the start address is above PAGE_OFFSET. This check is not completely correct for kernel memory (the upper boundary has to be checked as well so we do not end up with highmem pages), and wrong for IO mappings (the mapping must exist in the vmalloc region). Fix this by using the proper predicates (virt_addr_valid and is_vmalloc_addr), which also work correctly on ARM64 (where the vmalloc region is below PAGE_OFFSET). Also change the BUG_ON() into a less agressive error return. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
arm64 cannot represent the kernel VAs in HYP mode, because of the lack of TTBR1 at EL2. A way to cope with this situation is to have HYP VAs to be an offset from the kernel VAs. Introduce macros to convert a kernel VA to a HYP VA, make the HYP mapping functions use these conversion macros. Also change the documentation to reflect the existence of the offset. On ARM, where we can have an identity mapping between kernel and HYP, the macros are without any effect. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
In order to keep the VFP allocation code common, use an abstract type for the VFP containers. Maps onto struct vfp_hard_struct on ARM. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Make the split of the pgd_ptr an implementation specific thing by moving the init call to an inline function. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Move low level MMU-related operations to kvm_mmu.h. This makes the MMU code reusable by the arm64 port. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Christoffer Dall 提交于
This one got lost in the move to handle_exit, so let's reintroduce it using an accessor to the immediate value field like the other ones. Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
The exit handler selection code cannot be shared with arm64 (two different modes, more exception classes...). Move it to a separate file (handle_exit.c). Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
This is really hardware emulation, and as such it better be with its little friends. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Bit 8 is cache maintenance, bit 9 is external abort. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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由 Marc Zyngier 提交于
Instead of directly accessing the fault registers, use proper accessors so the core code can be shared. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Marc Zyngier 提交于
On 32bit ARM, unsigned long is guaranteed to be a 32bit quantity. On 64bit ARM, it is a 64bit quantity. In order to be able to share code between the two architectures, convert the registers to be unsigned long, so the core code can be oblivious of the change. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Jonghwan Choi 提交于
hyp_hvc vector offset is 0x14 and hyp_svc vector offset is 0x8. Signed-off-by: NJonghwan Choi <jhbird.choi@samsung.com> Signed-off-by: NChristoffer Dall <cdall@cs.columbia.edu>
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- 01 3月, 2013 11 次提交
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由 Florian Fainelli 提交于
The Armada 370 Reference Design board has one SD card slot, directly connected to the SDIO IP of the SoC, so we enable this IP. there are no GPIOs for card-detect and write-protect so we do not specify any. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Jason Cooper 提交于
Signed-off-by: NJason Cooper <jason@lakedaemon.net> Tested-by: NAndrew Lunn <andrew@lunn.ch>
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由 Jason Cooper 提交于
Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
Add a DT node for I2C and pinctrl hog for the pins. There appears to be an i2c bus on topkick with a device on it: i2cdetect 0 WARNING! This program can confuse your I2C bus, cause data loss and worse! I will probe file /dev/i2c-0. I will probe address range 0x03-0x77. Continue? [Y/n] y 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- 64 -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Jason Cooper 提交于
Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Sebastian Hesselbarth 提交于
of_serial now has support for using clocks property and we have a DT clock provider. This patch replaces the hard coded clock-frequency property with a clocks phandle to tclk. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Gregory CLEMENT 提交于
This patch add support for the SPI flash MX25l25635E which is present on the Armada 370 DB board. This flash stores the bootloader and its environment. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Gregory CLEMENT 提交于
This patch add support for the SPI flash M25P64 which is present on the Armada XP DB board. This flash stores the bootloader and its environment. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
This patch adds an SPI master device node for Armada XP-GP board. This master node is an SPI flash controller 'n25q128a13'. Since there is no 'partitions' node declared, one full sized partition named as the device will be created. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Tested-by: NGregory Clement <gregory.clement@free-electrons.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NGregory Clement <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
The Armada 370 and Armada XP SoC has an SPI controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Note that the Armada XP SPI register length is 0x50 bytes, while Armada 370 SPI register length is 0x28 bytes, so we choose the smaller of the two. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Acked-by: NGregory Clement <gregory.clement@free-electrons.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Gregory CLEMENT 提交于
Now that the time-armada-370-xp support local timers, updated the device tree to take it into account. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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