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  1. 29 4月, 2017 1 次提交
  3. 02 3月, 2017 2 次提交
  5. 01 2月, 2017 1 次提交
  7. 17 11月, 2016 1 次提交
  9. 16 11月, 2016 1 次提交
    • M
      xtensa: fix screen_info, clean up unused declarations in setup.c · 03eae3ac
      由 Max Filippov 提交于 
      screen_info on xtensa has old style initializer without field names.
It was broken by the commit d9b26352 ("x86, setup: Store the boot
cursor state") that split the unused2 field into two.

Rewrite screen_info initialization with explicit field names.

Drop unused declarations/tentative definitions of RTC- and FD-related
structures. Drop inclusion of linux/timex.h when RTC is enabled in
configuration.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      03eae3ac
  11. 21 9月, 2016 1 次提交
    • M
      xtensa: rearrange CCOUNT calibration · 205ad548
      由 Max Filippov 提交于 
      DT-enabled kernel should have a CPU node connected to a clock. This clock
is the CCOUNT clock. Use old platform_calibrate_ccount call as a fallback
when CPU node cannot be found or has no clock and in non-DT-enabled
configurations.

Drop no longer needed code that updates CPU clock-frequency property in
the DT; drop DT-related code from the platform_calibrate_ccount too.

Move of_clk_init to the top of time_init, so that clocks are initialized
before CCOUNT calibration is attempted.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      205ad548
  13. 12 9月, 2016 3 次提交
  15. 27 7月, 2016 2 次提交
  17. 24 7月, 2016 2 次提交
    • M
      xtensa: drop sysmem and switch to memblock · 0e46c111
      由 Max Filippov 提交于 
      Memblock is the standard kernel boot-time memory tracker/allocator. Use
it instead of the custom sysmem allocator. This allows using kmemleak,
CMA and device tree memory reservation.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      0e46c111
    • M
      xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE} · 3de00482
      由 Max Filippov 提交于 
      Now that the kernel load address and KSEG physical base address have
their own Kconfig symbols PLATFORM_DEFAULT_MEM seems redundant. It makes
little sense to use it in MMU configurations instead of KSEG_PADDR.
In noMMU configurations there's no explicit KSEG, so it's still useful
for the early cache initialization and definition of ARCH_PFN_OFFSET,
which affects mem_map size.

- limit it to noMMU; MMU variants have XCHAL_KSEG_PADDR and
  XCHAL_KSEG_SIZE;
- don't use it to define TASK_SIZE or MAX_LOW_PFN: first doesn't make
  any difference in noMMU, second is meaningless as there's no high
  memory;
- don't add default physical memory region: memory layout should come
  from the DT, bootloader tags, or memmap= command line parameter.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      3de00482
  19. 24 6月, 2016 1 次提交
  21. 03 11月, 2015 1 次提交
    • M
      xtensa: fix secondary core boot in SMP · ab45fb14
      由 Max Filippov 提交于 
      There are multiple factors adding to the issue in different
configurations:

- commit 17290231 ("xtensa: add fixup for double exception raised
  in window overflow") added function window_overflow_restore_a0_fixup to
  double exception vector overlapping reset vector location of secondary
  processor cores.
- on MMUv2 cores RESET_VECTOR1_VADDR may point to uncached kernel memory
  making code overlapping depend on cache type and size, so that without
  cache or with WT cache reset vector code overwrites double exception
  code, making issue even harder to detect.
- on MMUv3 cores RESET_VECTOR1_VADDR may point to unmapped area, as
  MMUv3 cores change virtual address map to match MMUv2 layout, but
  reset vector virtual address is given for the original MMUv3 mapping.
- physical memory region of the secondary reset vector is not reserved
  in the physical memory map, and thus may be allocated and overwritten
  at arbitrary moment.

Fix it as follows:

- move window_overflow_restore_a0_fixup code to .text section.
- define RESET_VECTOR1_VADDR so that it points to reset vector in the
  cacheable MMUv2 map for cores with MMU.
- reserve reset vector region in the physical memory map. Drop separate
  literal section and build mxhead.S with text section literals.

Cc: <stable@vger.kernel.org>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      ab45fb14
  23. 02 11月, 2015 1 次提交
    • M
      xtensa: nommu: provide correct KIO addresses · 260c64bb
      由 Max Filippov 提交于 
      KIO region location is different for noMMU cores. Provide different
default physical address and make KIO virtual address equal to physical.

Move xtensa_get_kio_paddr function close to XCHAL_KIO_PADDR definition
and define it not only for MMUv3, but for all MMU options except MMUv2.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      260c64bb
  25. 14 2月, 2015 1 次提交
  27. 30 4月, 2014 2 次提交
  29. 02 4月, 2014 3 次提交
  31. 22 2月, 2014 1 次提交
  33. 15 1月, 2014 6 次提交
  35. 10 10月, 2013 3 次提交
  37. 07 9月, 2013 1 次提交
  39. 24 7月, 2013 1 次提交
  41. 08 7月, 2013 2 次提交
  43. 24 2月, 2013 1 次提交
  45. 19 12月, 2012 2 次提交
    • C
      xtensa: clean up files to make them code-style compliant · c4c4594b
      由 Chris Zankel 提交于 
      Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.
Signed-off-by: NChris Zankel <chris@zankel.net>
      c4c4594b
    • M
      xtensa: add device trees support · da844a81
      由 Max Filippov 提交于 
      Device trees allow specification of hardware topology and device
parameters at runtime instead of hard-coding them in platform setup
code. This allows running single binary kernel on a range of compatible
boards.

New boot parameters tag BP_TAG_FDT is allocated and a pointer to flat
device tree is passed in it.

Note that current interrupt mapping scheme uses single cell for
interrupt identification. That means that IRQ numbers used in DTS must
be CPU internal IRQ numbers, not external. It is possible to extend
interrupt identification to two cells, and use second cell to tell
external IRQ numbers form internal. That would allow to use single DTS
on multiple boards with different mapping of external IRQ numbers.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NChris Zankel <chris@zankel.net>
      da844a81