- 23 1月, 2014 2 次提交
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由 Leonid Yegoshin 提交于
The TLBINVF instruction can be used to flush the entire VTLB. This eliminates the need for the TLBWI loop and improves performance. Reviewed-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLeonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6138/
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由 Markos Chandras 提交于
The UNIQUE_ENTRYHI definition was duplicated whenever there was the need to flush the TLB entries. We move this common definition to a header file. Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6129/
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- 30 10月, 2013 1 次提交
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由 Ralf Baechle 提交于
It was ugly. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 18 9月, 2013 1 次提交
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由 Ralf Baechle 提交于
o Move current_cpu_type() to a separate header file o #ifdefing on supported CPU types lets modern GCC know that certain code in callers may be discarded ideally turning current_cpu_type() into a function returning a constant. o Use current_cpu_type() rather than direct access to struct cpuinfo_mips. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5833/
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- 15 7月, 2013 1 次提交
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由 Paul Gortmaker 提交于
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [ralf@linux-mips.org: Folded in Paul's followup fix.] Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 17 5月, 2013 1 次提交
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由 David Daney 提交于
This reverts commit d532f3d2. The original commit has several problems: 1) Doesn't work with 64-bit kernels. 2) Calls TLBMISS_HANDLER_SETUP() before the code is generated. 3) Calls TLBMISS_HANDLER_SETUP() twice in per_cpu_trap_init() when only one call is needed. [ralf@linux-mips.org: Also revert the bits of the ASID patch which were hidden in the KVM merge.] Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: "Steven J. Hill" <Steven.Hill@imgtec.com> Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5242/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 08 5月, 2013 2 次提交
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由 Steven J. Hill 提交于
Original patch by Ralf Baechle and removed by Harold Koerfgen with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This allows for more generic kernels since the size of the ASID and corresponding masks can be determined at run-time. This patch is also required for the new Aptiv cores and has been tested on Malta and Malta Aptiv platforms. [ralf@linux-mips.org: Added relevant part of fix https://patchwork.linux-mips.org/patch/5213/] Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Sanjay Lal 提交于
Signed-off-by: NSanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 01 2月, 2013 1 次提交
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由 Ralf Baechle 提交于
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 12 12月, 2012 2 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
We need Huge TLBs for HUGETLB_PAGE, or the soon to follow TRANSPARENT_HUGEPAGE. collect this information under a single Kconfig symbol. Signed-off-by: NDavid Daney <david.daney@cavium.com>
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- 04 12月, 2012 1 次提交
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由 David Daney 提交于
Problem: 1) Huge page mapping of anonymous memory is initially invalid. Will be faulted in by copy-on-write mechanism. 2) Userspace attempts store at the end of the huge mapping. 3) TLB Refill exception handler fill TLB with a normal (4K sized) invalid page at the end of the huge mapping virtual address range. 4) Userspace restarted, and re-attempts the store at the end of the huge mapping. 5) Page from #3 is invalid, we get a fault and go to the hugepage fault handler. This tries to map a huge page and calls huge_ptep_set_access_flags() to install the mapping. 6) We just call the generic ptep_set_access_flags() to set up the page tables, but the flush there assumes a normal (4K sized) page and only tries to flush the first part of the huge page virtual address out of the TLB, since the existing entry from step #3 doesn't conflict, nothing is flushed. 7) We attempt to load the mapping into the TLB, but because it conflicts with the entry from step #3, we get a Machine Check exception. The fix: Flush the entire rage covered by the huge page in huge_ptep_set_access_flags(), and remove the optimization in local_flush_tlb_range() so that the flush actually does the correct thing. Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Hillf Danton <dhillf@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4661/Signed-off-by: NRalf Baechle <ralf@linux-mips.org> (cherry picked from commit dd617f258cc39d36be26afee9912624a2d23112c)
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- 17 10月, 2012 1 次提交
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由 Ralf Baechle 提交于
On some CPU the write to pagemask might complete before the TLB write instruction reads from the pagemask register. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 14 9月, 2012 1 次提交
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由 Steven J. Hill 提交于
Remove usage of the 'kernel_uses_smartmips_rixi' macro from all files and use new 'cpu_has_rixi' instead. Signed-off-by: NSteven J. Hill <sjhill@mips.com> Acked-by: NDavid Daney <david.daney@cavium.com>
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- 29 3月, 2012 1 次提交
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由 David Howells 提交于
Disintegrate asm/system.h for MIPS. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NRalf Baechle <ralf@linux-mips.org> cc: linux-mips@linux-mips.org
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- 11 1月, 2012 2 次提交
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由 Ralf Baechle 提交于
Only available for R4000 style TLBs anyway and proper ordering of initialization code made this crude interface unncecessary. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Hillf Danton 提交于
When flushing TLB, if @vma is backed by huge page, we could flush huge TLB, due to that huge page is defined to be far from normal page. Signed-off-by: NHillf Danton <dhillf@gmail.com> Acked-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: "Jayachandran C." <jayachandranc@netlogicmicro.com> Patchwork: https://patchwork.linux-mips.org/patch/2825/Signed-off-by: NDavid Daney <david.daney@cavium.com> Acked-by: NHillf Danton <dhillf@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3114/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 08 12月, 2011 1 次提交
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由 Ralf Baechle 提交于
Move add_wired_entry to its own header file from where it will be always included. Patch up other users of add_wired_entry to also include the header as needed. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 25 10月, 2011 1 次提交
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由 Manuel Lauss 提交于
For Alchemy-PCI I need to add a wired entry after resuming from RAM; remove the __init from add_wired_entry() so that this actually works. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2684/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 06 4月, 2011 1 次提交
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由 Justin P. Mattock 提交于
Signed-off-by: NJustin P. Mattock <justinmattock@gmail.com> Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 27 2月, 2010 3 次提交
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由 David Daney 提交于
The SmartMIPS ASE specifies how Read Inhibit (RI) and eXecute Inhibit (XI) bits in the page tables work. The upper two bits of EntryLo{0,1} are RI and XI when the feature is enabled in the PageGrain register. SmartMIPS only covers 32-bit systems. Cavium Octeon+ extends this to 64-bit systems by continuing to place the RI and XI bits in the top of EntryLo even when EntryLo is 64-bits wide. Because we need to carry the RI and XI bits in the PTE, the layout of the PTE is changed. There is a two instruction overhead in the TLB refill hot path to get the EntryLo bits into the proper position. Also the TLB load exception has to probe the TLB to check if RI or XI caused the exception. Also of note is that the layout of the PTE bits is done at compile and runtime rather than statically. In the 32-bit case this allows for the same number of PFN bits as before the patch as the _PAGE_HUGE is not supported in 32-bit kernels (we have _PAGE_NO_EXEC and _PAGE_NO_READ instead of _PAGE_READ and _PAGE_HUGE). The patch is tested on Cavium Octeon+, but should also work on 32-bit systems with the Smart-MIPS ASE. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/952/ Patchwork: http://patchwork.linux-mips.org/patch/956/ Patchwork: http://patchwork.linux-mips.org/patch/962/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The function is #if 0ed out. There are no other occurrences of its name in the tree. It is safe to remove. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/936/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The function probe_tlb() only does anything for processors that are not PRID_COMP_LEGACY. This is precisely the set of processors for which decode_configs() is called to do identical tlbsize probing calculations. Therefore probe_tlb() is completely redundant and may be removed. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/865/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 18 9月, 2009 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 25 6月, 2009 1 次提交
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由 Ralf Baechle 提交于
Some of the were relying into smp.h being dragged in by another header which of course is fragile. <asm/cpu-info.h> uses smp_processor_id() only in macros and including smp.h there leads to an include loop, so don't change cpu-info.h. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 17 6月, 2009 1 次提交
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由 David Daney 提交于
The TLB handlers need to check for huge pages and give them special handling. Huge pages consist of two contiguous sub-pages of physical memory. * Loading entrylo0 and entrylo1 need to be handled specially. * The page mask must be set for huge pages and then restored after writing the TLB entries. * The PTE for huge pages resides in the PMD, we halt traversal of the tables there. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 21 5月, 2009 1 次提交
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由 Greg Ungerer 提交于
The address range size calculation inside local_flush_tlb_kernel_range() is being truncated by a too small size variable holder on 64-bit systems. The truncated size can result in an erroneous tlbsize check that means we sit spinning inside a loop trying to flush a hige number of TLB entries. This is for all intents and purposes a system hang. Fix by using an appropriately sized valiable to hold the size. [Ralf: Greg's original patch submission identified the issue and fixed one instance in tlb-r4k.c but there there were several more. For consistency I also modified tlb-r3k.c even though that file is only used on 32-bit.] Signed-off-by: NGreg Ungerer <gerg@snapgear.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 1月, 2009 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 29 4月, 2008 1 次提交
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由 Chris Dearman 提交于
Still, only the 4K may actually implement it. Signed-off-by: NChris Dearman <chris@mips.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 12 3月, 2008 2 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Thiemo Seufer 提交于
We support now other page sizes as well. Signed-off-by: NThiemo Seufer <ths@networkno.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 12 10月, 2007 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 11 7月, 2007 1 次提交
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由 Fuxin Zhang 提交于
Signed-off-by: NFuxin Zhang <zhangfx@lemote.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 19 1月, 2007 1 次提交
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由 Ralf Baechle 提交于
This call may have resulted to local_tlb_flush_range returning with interrupts disabled resulting in excessive interrupt latency. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 27 9月, 2006 1 次提交
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由 Ralf Baechle 提交于
This is the unchanged part 2 of Chris' hazard cleanup. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 01 7月, 2006 1 次提交
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由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 20 6月, 2006 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 19 4月, 2006 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 21 3月, 2006 1 次提交
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由 Thiemo Seufer 提交于
Basically identical to c-r4k.c, so maintaining one is really enough. Signed-off-by: NThiemo Seufer <ths@networkno.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 30 10月, 2005 1 次提交
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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