Initialize and power the 3D unit on Tegra20, Tegra30 and Tegra114 and
register a channel with the Tegra DRM driver so that the unit can be
used from userspace.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Command stream submissions are the same across all devices that expose
a channel to userspace, so move the code into a generic function.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Tegra114 TMDS configuration requires a new peak_current field and the
driver current override bit has changed position.
Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

When the DRM driver is unloaded, all the associated resources must be
cleaned up and zeroed out. This is necessary because of the architecture
of the Tegra DRM driver, where not all subdrivers are unloaded along
with the DRM driver. Therefore device-managed managed won't be freed and
memory cannot be assumed to have been cleared (because it hasn't been
reallocated using kzalloc()) by the time the DRM driver is reloaded. It
is therefore necessary to zero out the structures to prevent strange
errors (such as slab corruptions) from occurring.
Signed-off-by: NThierry Reding <treding@nvidia.com>

In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Tegra DRM driver currently uses some infrastructure to defer the DRM
core initialization until all required devices have registered. The same
infrastructure can potentially be used by any other driver that requires
more than a single sub-device of the host1x module.

Make the infrastructure more generic and keep only the DRM specific code
in the DRM part of the driver. Eventually this will make it easy to move
the DRM driver part back to the DRM subsystem.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Expose the buffer objects, syncpoint and channel functionality in the
public public header so that drivers can use them.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This structure derives from host1x_client. DRM-specific fields are moved
from host1x_client to this structure, so that host1x_client can remain
agnostic of DRM.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Most of the included files are either not required or already included
by some other header file.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The structure represents a context associated with a particular process
that has opened the Tegra DRM device and requested a channel. This is a
very DRM-specific notion and has nothing to do with host1x. Rename the
structure to more clearly mark the boundaries between the two.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This structure extends drm_file with Tegra DRM specific fields and has
nothing to do with host1x. Rename the structure to more clearly mark the
boundaries between host1x and Tegra DRM.

While at it, move the structure definition out of the header. It's never
used outside of the drm.c source file, so it can be defined within that.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The host1x and Tegra DRM drivers are currently tightly coupled. Renaming
the structure marks the boundary more clearly.
Signed-off-by: NThierry Reding <treding@nvidia.com>

irq_enabled is only ever 0 or 1, so make it a bool.
Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

VMA offsets are 64bit so do not cast them to "unsigned int". Also remove
the (now useless) offset-retrieval helper. The VMA manager provides simple
enough helpers.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Cc: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NDavid Herrmann <dh.herrmann@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

So I've stumbled over drm_fasync and wondered what it does. Digging
that up is quite a story.

First I've had to read up on what this does and ended up being rather
bewildered why peopled loved signals so much back in the days that
they've created SIGIO just for that ...

Then I wondered how this ever works, and what that strange "No-op."
comment right above it should mean. After all calling the core fasync
helper is pretty obviously not a noop. After reading through the
kernels FASYNC implementation I've noticed that signals are only sent
out to the processes attached with FASYNC by calling kill_fasync.

No merged drm driver has ever done that.

After more digging I've found out that the only driver that ever used
this is the so called GAMMA driver. I've frankly never heard of such a
gpu brand ever before. Now FASYNC seems to not have been the only bad
thing with that driver, since Dave Airlie removed it from the drm
driver with prejudice:

commit 1430163b4bbf7b00367ea1066c1c5fe85dbeefed
Author: Dave Airlie <airlied@linux.ie>
Date:   Sun Aug 29 12:04:35 2004 +0000

    Drop GAMMA DRM from a great height ...

Long story short, the drm fasync support seems to be doing absolutely
nothing. And the only user of it was never merged into the upstream
kernel. And we don't need any fops->fasync callback since the fcntl
implementation in the kernel already implements the noop case
correctly.

So stop this particular cargo-cult and rip it all out.

v2: Kill drm_fasync assignments in rcar (newly added) and imx drivers
(somehow I've missed that one in staging). Also drop the reference in
the drm DocBook. ARM compile-fail reported by Rob Clark.

v3: Move the removal of dev->buf_asnyc assignment in drm_setup to this
patch here.

v4: Actually git add ... tsk.

Cc: Dave Airlie <airlied@linux.ie>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Rob Clark <robdclark@gmail.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: NDavid Herrmann <dh.herrmann@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Because, there is no reason for it not to be const.

v1: original
v2: fix compile break in vmwgfx, and couple related cleanups suggested
    by Ville Syrjälä
Signed-off-by: NRob Clark <robdclark@gmail.com>
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

All the gem based kms drivers really want the same function to
destroy a dumb framebuffer backing storage object.

So give it to them and roll it out in all drivers.

This still leaves the option open for kms drivers which don't use GEM
for backing storage, but it does decently simplify matters for gem
drivers.
Acked-by: NInki Dae <inki.dae@samsung.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Ben Skeggs <skeggsb@gmail.com>
Reviwed-by: NRob Clark <robdclark@gmail.com>
Cc: Alex Deucher <alexdeucher@gmail.com>
Acked-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This patch merges host1x_syncpt_cpu_incr to host1x_syncpt_incr() as
they are in practise doing the same thing. host1x_syncpt_incr() is
also modified to return error codes. User space interface is modified
accordingly to pass return values.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Acked-By: NTerje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

DRIVER_BUS_PLATFORM is not a DRM driver feature flag, it must not be set
in the driver's driver_features field.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Add the missing unlock before return from function host1x_drm_init() and
host1x_drm_exit() in the error handling case.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Since the Tegra DRM driver doesn't use the drm_irq_install() helper, the
irq_enabled flag needs to be set manually in order to make functionality
such as the DRM_IOCTL_WAIT_VBLANK work properly.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Add client driver for 2D device, and IOCTLs to pass work to host1x
channel for 2D.

Also adds functions that can be called to access sync points from
DRM.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

This patch introduces a memory manager for tegra drm and moves
existing parts to use it. As cma framebuffer helpers can no more
be used, this patch adds also a separate framebuffer driver for
tegra.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Remove second host1x driver, and bind tegra-drm to the new host1x
driver. The logic to parse device tree and track clients is moved
to drm.c.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Both host1x and drm drivers have host1x structures. This patch
renames the host1x structure under drm to follow name host1x_drm.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Make drm part of host1x driver.
Signed-off-by: NArto Merilainen <amerilainen@nvidia.com>
Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

This list is most useful to inspect whether framebuffer reference
counting works as expected. The code is loosely based on the i915
implementation.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

All the necessary support bits like .mode_set_base() and VBLANK are now
available, so page-flipping case easily be implemented on top.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Implement support for the VBLANK IOCTL. Note that Tegra is somewhat
special in this case because it doesn't use the generic IRQ support
provided by the DRM core (DRIVER_HAVE_IRQ) but rather registers one
interrupt handler for each display controller.

While at it, clean up the way that interrupts are enabled to ensure
that the VBLANK interrupt only gets enabled when required.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>

Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This commit adds a KMS driver for the Tegra20 SoC. This includes basic
support for host1x and the two display controllers found on the Tegra20
SoC. Each display controller can drive a separate RGB/LVDS output.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Zhang <markz@nvidia.com>
Reviewed-by: NMark Zhang <markz@nvidia.com>
Tested-by: NMark Zhang <markz@nvidia.com>
Tested-and-acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Tested-by: NTerje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>