- 19 8月, 2013 16 次提交
-
-
由 Maarten Lankhorst 提交于
Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: NThomas Hellstrom <thellstrom@vmware.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 David Herrmann 提交于
This field is never read. No need to set it in radeon. Besides, DRM gem core clears it during setup, anyway. Signed-off-by: NDavid Herrmann <dh.herrmann@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 David Herrmann 提交于
These two helpers are unused. Remove them. They rely on gem_obj->driver_private, which is set to NULL during setup. As this field isn't used by the driver, anymore, we can remove this assignment as well. Signed-off-by: NDavid Herrmann <dh.herrmann@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 David Herrmann 提交于
gem_bo->driver_private is never read by cirrus nor DRM core. No need to set it. Besides, drm core clears it during setup, anyway. Signed-off-by: NDavid Herrmann <dh.herrmann@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 David Herrmann 提交于
gem_bo->driver_private is never read by mgag200 nor DRM core. No need to set it. Besides, drm core clears it during setup, anyway. Signed-off-by: NDavid Herrmann <dh.herrmann@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 David Herrmann 提交于
gem_bo->driver_private is never read by ast nor DRM core. No need to set it. Besides, drm core clears it during setup, anyway. Signed-off-by: NDavid Herrmann <dh.herrmann@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Dave Airlie 提交于
Merge the rcar stable branch that is being shared with the arm-soc tree. Signed-off-by: NDave Airlie <airlied@redhat.com> * pfdo/drm-rcar-for-v3.12: (220 commits) drm/rcar-du: Add FBDEV emulation support drm/rcar-du: Add internal LVDS encoder support drm/rcar-du: Configure RGB output routing to DPAD0 drm/rcar-du: Rework output routing support drm/rcar-du: Add support for DEFR8 register drm/rcar-du: Add support for multiple groups drm/rcar-du: Fix buffer pitch alignment for R8A7790 DU drm/rcar-du: Add support for the R8A7790 DU drm/rcar-du: Move output routing configuration to group drm/rcar-du: Remove register definitions for the second channel drm/rcar-du: Use dynamic number of CRTCs instead of CRTCs array size drm/rcar-du: Introduce CRTCs groups drm/rcar-du: Rename rcar_du_plane_(init|register) to rcar_du_planes_* drm/rcar-du: Create rcar_du_planes structure drm/rcar-du: Rename platform data fields to match what they describe drm/rcar-du: Merge LVDS and VGA encoder code drm/rcar-du: Split VGA encoder and connector drm/rcar-du: Split LVDS encoder and connector drm/rcar-du: Clarify comment regarding plane Y source coordinate drm/rcar-du: Support per-CRTC clock and IRQ ... Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/i915/intel_pm.c drivers/gpu/drm/qxl/qxl_release.c
-
由 Darren Etheridge 提交于
Add a fixup function that will flip the hsync priority and add a hskew value that is used to shift the tda998x to the right by a variable number of pixels depending on the mode. This works around an issue with the sync timings that tilcdc is outputing. Signed-off-by: NDarren Etheridge <detheridge@ti.com> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Sebastian Hesselbarth 提交于
Some LCD controller cannot provide valid VESA style sync, i.e. coincident HS/VS edges. First, this patch adds hskew passed from the adjusted_mode to reference pixel calculation to allow those controllers to add an offset relative to the expected reference pixel. Signed-off-by: NDarren Etheridge <detheridge@ti.com> Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Sebastian Hesselbarth 提交于
This fixes the wrong sync generation and sync calculation of TDA998x for HS/VS-based sync detection. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NDarren Etheridge <detheridge@ti.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Russell King 提交于
This patch adds tda998x specific parameters to allow it to be configured for different boards using it. Also, this implements rudimentary audio support for S/PDIF attached controllers. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NDarren Etheridge <detheridge@ti.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Russell King 提交于
The video-input-port (VIP) is highly configurable. This prepares current driver to allow to configure VIP configuration, as some boards connect lcd controller and TDA998x "pin-swapped" and depend on VIP to swap the pins by register configuration. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NDarren Etheridge <detheridge@ti.com> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Russell King 提交于
The npix/nline registers are supposed to be programmed with the total number of pixels/lines, not the displayed pixels/lines, and not minus one either. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NDarren Etheridge <detheridge@ti.com> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Russell King 提交于
When switching between various drivers for this device, it's possible that some critical registers are left containing values which affect the device operation. One such case encountered is the VIP output mux register. This defaults to 0x24 on powerup, but other drivers may set this to 0x12. This results in incorrect colours. Fix this by ensuring that the register is always set to the power on default setting. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NDarren Etheridge <detheridge@ti.com> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Russell King 提交于
TDA19988 devices need their RAM enabled in order to read EDID information. Add support for this. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NRob Clark <robdclark@gmail.com> Tested-by: NDarren Etheridge <detheridge@ti.com> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NRussell King <rmk_kernel@arm.linux.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
由 Geert Uytterhoeven 提交于
If NO_DMA=y: drivers/built-in.o: In function `__drm_pci_free': drivers/gpu/drm/drm_pci.c:112: undefined reference to `dma_free_coherent' drivers/built-in.o: In function `drm_pci_alloc': drivers/gpu/drm/drm_pci.c:72: undefined reference to `dma_alloc_coherent' drivers/built-in.o: In function `drm_gem_unmap_dma_buf': drivers/gpu/drm/drm_prime.c:87: undefined reference to `dma_unmap_sg' drivers/built-in.o: In function `drm_gem_map_dma_buf': drivers/gpu/drm/drm_prime.c:78: undefined reference to `dma_map_sg' Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
-
- 10 8月, 2013 24 次提交
-
-
git://linuxtv.org/pinchartl/fbdev由 Dave Airlie 提交于
Create topic branch for rcar for shmobile tree to pull as well, arm-soc should probably merge after drm merges if possible. Signed-off-by: NDave Airlie <airlied@redhat.com> * 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev: (23 commits) drm/rcar-du: Add FBDEV emulation support drm/rcar-du: Add internal LVDS encoder support drm/rcar-du: Configure RGB output routing to DPAD0 drm/rcar-du: Rework output routing support drm/rcar-du: Add support for DEFR8 register drm/rcar-du: Add support for multiple groups drm/rcar-du: Fix buffer pitch alignment for R8A7790 DU drm/rcar-du: Add support for the R8A7790 DU drm/rcar-du: Move output routing configuration to group drm/rcar-du: Remove register definitions for the second channel drm/rcar-du: Use dynamic number of CRTCs instead of CRTCs array size drm/rcar-du: Introduce CRTCs groups drm/rcar-du: Rename rcar_du_plane_(init|register) to rcar_du_planes_* drm/rcar-du: Create rcar_du_planes structure drm/rcar-du: Rename platform data fields to match what they describe drm/rcar-du: Merge LVDS and VGA encoder code drm/rcar-du: Split VGA encoder and connector drm/rcar-du: Split LVDS encoder and connector drm/rcar-du: Clarify comment regarding plane Y source coordinate drm/rcar-du: Support per-CRTC clock and IRQ ...
-
由 Laurent Pinchart 提交于
Use the FB CMA helpers to implement FBDEV emulation support. The VGA connector status must be reported as connector_status_connected instead of connector_status_unknown to be usable by the emulation layer. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The R8A7790 includes two internal LVDS encoders. Support them in the DU driver. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The R8A7790 DU variant has a single RGB output called DPAD0 that can be fed with the output of DU0, DU1 or DU2. Making the routing configurable. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Split the output routing specification between SoC-internal data, specified in the rcar_du_device_info structure, and board data, passed through platform data. The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). SoC-internal output routing data specify which output are valid, which CRTCs can be connected to the valid outputs, and the type of in-SoC encoder for the output. Platform data then specifies external encoders and the output they are connected to. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The R8A7790 DU has a new extended function control register. Support it. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The R8A7790 DU has 3 CRTCs, split in two groups. Support them. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The R8A7790 DU seems to require a 128 bytes pitch alignment, even though the documentation only mentions a 16 pixels alignement as for the R8A7779 DU. Make this configurable through a device flag. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The DU revision in the R8A7790 SoC uses one IRQ and clock per CRTC. Add a corresponding entry in the module platform ID table. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Output routing is configured in group registers, move the corresponding code from rcar_du_crtc.c to rcar_du_group.c. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Channels are accessed through a global channel memory offset, there's no need to define register addresses for the second channel. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The rcar_du_device structure contains a field that stores the number of CRTCs, use it instead of the CRTCs array size. This prepares the driver to support a variable number of CRTCs. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The R8A7779 DU is split in per-CRTC resources (scan-out engine, blending unit, timings generator, ...) and device-global resources (start/stop control, planes, ...) shared between the two CRTCs. The R8A7790 introduced a third CRTC with its own set of global resources This would be modeled as two separate DU device instances if it wasn't for a handful or resources that are shared between the three CRTCs (mostly related to input and output routing). For this reason the R8A7790 DU must be modeled as a single device with three CRTCs, two sets of "semi-global" resources, and a few device-global resources. Introduce a new rcar_du_group driver-specific object, without any real counterpart in the DU documentation, that models those semi-global resources. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The functions initialize or register all planes, rename them accordingly. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Move the plane-related fields of struct rcar_du_device to their own structure. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The struct rcar_du_encoder_data encoder::field describes the encoder type, and the rcar_du_encoder_lvds_data and rcar_du_encoder_vga_data structures describe connector properties. Rename them accordingly. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Create a single rcar_du_encoder structure that implements a KMS encoder. The current implementation is straightforward and only configures CRTC output routing. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
This prepares for the encoders rework. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
This prepares for the encoders rework. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The R8A7790 DU documentation contains further information regarding the plane Y source coordinate. Update the comment accordingly. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Some of the DU revisions use one clock and IRQ per CRTC instead of one clock and IRQ per device. Retrieve the correct clock and register the correct IRQ for each CRTC. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
The platform device id driver data field points to a device information structure that only contains a (currently empty) features field for now. Support for additional model-dependent features will be added later. Only the R8A7779 variant is currently supported. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Replace the devm_request_mem_region() and devm_ioremap_nocache() calls with devm_ioremap_resource(). Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
由 Laurent Pinchart 提交于
Several alpha plane register definitions are missing, add them. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-