The Freescale and Marvell PCI controllers dont require explicit setting for
type 1 config cycles.  They handle producing them by implicitly looking at the
bus, devfn.

The TSI108 and 52xx don't use the generic PCI indirect code and thus don't
bother with set_cfg_type.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch adds PCI bridge support for the Marvell mv64x60 chip.
We also provide the ability to read/write the mv64x60 hotswap
register via sysfs if the hs_reg_valid property is set in the
device tree.
Signed-off-by: NDale Farnsworth <dale@farnsworth.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPaul Mackerras <paulus@samba.org>