1. 06 11月, 2009 2 次提交
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      drm/i915: implement fastpath for overlay flip waiting · 5a5a0c64
      Daniel Vetter 提交于
      As long as the gpu can keep up, neither the cpu (waiting for gpu)
      nore the gpu (waiting for vblank to do an overlay flip) stalls.
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      5a5a0c64
    • D
      drm/i915: implement drmmode overlay support v4 · 02e792fb
      Daniel Vetter 提交于
      This implements intel overlay support for kms via a device-specific
      ioctl. Thomas Hellstrom brought up the idea of a general ioctl (on
      dri-devel). We've reached the conclusion that such an infrastructure
      only makes sense when multiple kms overlay implementations exists,
      which atm don't (and it doesn't look like this is gonna change).
      
      Open issues:
      - Runs in sync with the gpu, i.e. unnecessary waiting. I've decided
        to wait on this because the hw tends to hang when changing something
        in this area. I left some dummy functions as infrastructure.
      - polyphase filtering uses a static table.
      - uses uninterruptible sleeps. Unfortunately the alternatives may
        unnecessarily wedged the hw if/when we timeout too early (and
        userspace only overloaded the batch buffers with stuff worth a few
        secs of gpu time).
      
      Changes since v1:
      - fix off-by-one misconception on my side. This fixes fullscreen
        playback.
      Changes since v2:
      - add underrun detection as spec'ed for i965.
      - flush caches properly, fixing visual corruptions.
      Changes since v4:
      - fix up cache flushing of overlay memory regs.
      - killed require_pipe_a logic - it hangs the chip.
      
      Tested-By: diego.abelenda@gmail.com (on a 865G)
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      [anholt: Resolved against the MADVISE ioctl going in before this one]
      Signed-off-by: NEric Anholt <eric@anholt.net>
      02e792fb
  2. 06 10月, 2009 1 次提交
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      drm/fb: add more correct 8/16/24/32 bpp fb support. · b8c00ac5
      Dave Airlie 提交于
      The previous patches had some unwanted side effects, I've fixed
      the lack of 32bpp working, and fixed up 16bpp so it should also work.
      
      this also adds the interface to allow the driver to set a preferred
      console depth so for example low memory rn50 can set it to 8bpp.
      It also catches 24bpp on cards that can't do it and forces 32bpp.
      
      Tested on r100/r600/i945.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      b8c00ac5
  3. 21 9月, 2009 1 次提交
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      drm/vgaarb: add VGA arbitration support to the drm and kms. · 28d52043
      Dave Airlie 提交于
      VGA arb requires DRM support for non-kms drivers, to turn on/off
      irqs when disabling the mem/io regions.
      
      VGA arb requires KMS support for GPUs where we can turn off VGA
      decoding. Currently we know how to do this for intel and radeon
      kms drivers, which allows them to be removed from the arbiter.
      
      This patch comes from Fedora rawhide kernel.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      28d52043
  4. 11 9月, 2009 1 次提交
    • J
      drm/i915: framebuffer compression for pre-GM45 · 80824003
      Jesse Barnes 提交于
      This patch adds framebuffer compression (good for about ~0.5W power
      savings in the best case) support for pre-GM45 chips.  GM45+ have a new,
      more flexible FBC scheme that will be added in a separate patch.
      
      FBC can't always be enabled: the compressed buffer must be physically
      contiguous and reside in stolen space.  So if you have a large display
      and a small amount of stolen memory, you may not be able to take
      advantage of FBC.  In some cases, a BIOS setting controls how much
      stolen space is available.  Increasing this to 8 or 16M can help.
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      80824003
  5. 09 9月, 2009 1 次提交
  6. 05 9月, 2009 1 次提交
    • J
      drm/i915: add dynamic clock frequency control · 652c393a
      Jesse Barnes 提交于
      There are several sources of unnecessary power consumption on Intel
      graphics systems. The first is the LVDS clock. TFTs don't suffer from
      persistence issues like CRTs, and so we can reduce the LVDS refresh rate
      when the screen is idle. It will be automatically upclocked when
      userspace triggers graphical activity. Beyond that, we can enable memory
      self refresh. This allows the memory to go into a lower power state when
      the graphics are idle. Finally, we can drop some clocks on the gpu
      itself. All of these things can be reenabled between frames when GPU
      activity is triggered, and so there should be no user visible graphical
      changes.
      Signed-off-by: NJesse Barnes <jesse.barnes@intel.com>
      Signed-off-by: NMatthew Garrett <mjg@redhat.com>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      652c393a
  7. 31 8月, 2009 1 次提交
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      drm/kms: move driver specific fb common code to helper functions (v2) · 785b93ef
      Dave Airlie 提交于
      Initially I always meant this code to be shared, but things
      ran away from me before I got to it.
      
      This refactors the i915 and radeon kms fbdev interaction layers
      out into generic helpers + driver specific pieces.
      
      It moves all the panic/sysrq enhancements to the core file,
      and stores a linked list of kernel fbs. This could possibly be
      improved to only store the fb which has fbcon on it for panics
      etc.
      
      radeon retains some specific codes used for a big endian
      workaround.
      
      changes:
      fix oops in v1
      fix freeing path for crtc_info
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      785b93ef
  8. 25 8月, 2009 1 次提交
  9. 30 7月, 2009 1 次提交
  10. 19 6月, 2009 3 次提交
  11. 15 5月, 2009 2 次提交
  12. 08 2月, 2009 1 次提交
  13. 07 1月, 2009 2 次提交
  14. 29 12月, 2008 1 次提交
    • J
      DRM: i915: add mode setting support · 79e53945
      Jesse Barnes 提交于
      This commit adds i915 driver support for the DRM mode setting APIs.
      Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
      supported.  HDMI, DisplayPort and additional SDVO output support will
      follow.
      
      Support for the mode setting code is controlled by the new 'modeset'
      module option.  A new config option, CONFIG_DRM_I915_KMS controls the
      default behavior, and whether a PCI ID list is built into the module for
      use by user level module utilities.
      
      Note that if mode setting is enabled, user level drivers that access
      display registers directly or that don't use the kernel graphics memory
      manager will likely corrupt kernel graphics memory, disrupt output
      configuration (possibly leading to hangs and/or blank displays), and
      prevent panic/oops messages from appearing.  So use caution when
      enabling this code; be sure your user level code supports the new
      interfaces.
      
      A new SysRq key, 'g', provides emergency support for switching back to
      the kernel's framebuffer console; which is useful for testing.
      
      Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      79e53945