1. 30 4月, 2013 1 次提交
  2. 11 4月, 2013 2 次提交
  3. 10 4月, 2013 1 次提交
  4. 09 4月, 2013 1 次提交
  5. 04 4月, 2013 1 次提交
  6. 19 3月, 2013 3 次提交
  7. 13 3月, 2013 2 次提交
  8. 06 3月, 2013 3 次提交
  9. 13 2月, 2013 3 次提交
    • P
      powerpc/85xx: dts - add ranges property for SEC · db29cd3c
      Po Liu 提交于
      This facilitates getting the physical address of the SEC node.
      Signed-off-by: NLiu po <po.liu@freescale.com>
      Reviewed-by: NKim Phillips <kim.phillips@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      db29cd3c
    • T
      powerpc/85xx: fix various PCI node compatible strings · 14bdc913
      Timur Tabi 提交于
      Fix and/or improve the compatible strings of the PCI device tree nodes for
      some Freescale SOCs.  This fixes some issues and improves consistency among
      the SOCs.
      
      Specifically:
      
      1) The P1022 has a v1 PCIe controller, so the compatible property should just
      say "fsl,mpc8548-pcie".  U-Boot does not look for "fsl,p1022-pcie", so it
      wasn't fixing up the node.
      
      2) The P4080 has a v2.1 PCIe controller, so add that version-specific string
      to the device tree.  Update the kernel to also look for that string.
      Currently, the kernel looks for "fsl,p4080-pcie" specifically, but
      eventually that check should be deleted.
      
      3) The P1010 device tree claims compatibility with v2.2 and v2.3, but that's
      redundant.  No other device tree does this.  Remove the v2.2 string.
      
      4) The kernel looks for both "fsl,p1023-pcie" and "fsl,qoriq-pcie-v2.2",
      even though the P1023 device trees has always included both strings.  Remove
      the search for "fsl,p1023-pcie".
      Signed-off-by: NTimur Tabi <timur@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      14bdc913
    • T
      powerpc/85xx: describe the PAMU topology in the device tree · 0408753f
      Timur Tabi 提交于
      The PAMU caches use the LIODNs to determine which cache lines hold the
      entries for the corresponding LIODs.  The LIODNs must therefore be
      carefully assigned to avoid cache thrashing -- two active LIODs with
      LIODNs that put them in the same cache line.
      
      Currently, LIODNs are statically assigned by U-Boot, but this has
      limitations.  LIODNs are assigned even for devices that may be disabled
      or unused by the kernel.  Static assignments also do not allow for device
      drivers which may know which LIODs can be used simultaneously.  In
      other words, we really should assign LIODNs dynamically in Linux.
      
      To do that, we need to describe the PAMU device and cache topologies in
      the device trees.
      Signed-off-by: NTimur Tabi <timur@freescale.com>
      Acked-by: NStuart Yoder <stuart.yoder@freescale.com>
      Acked-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      0408753f
  10. 25 11月, 2012 1 次提交
  11. 13 9月, 2012 4 次提交
  12. 10 8月, 2012 1 次提交
  13. 10 7月, 2012 3 次提交
    • Z
      powerpc/85xx: Add ucc uart support for p1025rdb · b5dc2986
      Zhicheng Fan 提交于
      Add device tree nodes to enable ucc uart support on P1025RDB.
      Signed-off-by: NZhicheng Fan <B32736@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      b5dc2986
    • P
      powerpc/85xx: Add BSC9131 RDB Support · d729b900
      Prabhakar Kushwaha 提交于
      BSC9131RDB is a Freescale reference design board for BSC9131 SoC. The
      BSC9131 is integrated SoC that targets Femto base station market. It
      combines Power Architecture e500v2 and DSP StarCore SC3850 core
      technologies with MAPLE-B2F baseband acceleration processing elements.
      
      The BSC9131 SoC includes the following function and features:
          . Power Architecture subsystem including a e500 processor with 256-Kbyte
          shared L2 cache
          . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
          . The Multi Accelerator Platform Engine for Femto BaseStation Baseband
            Processing (MAPLE-B2F)
          . A multi-standard baseband algorithm accelerator for Channel
            Decoding/Encoding, Fourier Transforms, UMTS chip rate processing, LTE
            UP/DL Channel processing, and CRC algorithms
          . Consists of accelerators for Convolution, Filtering, Turbo Encoding,
            Turbo Decoding, Viterbi decoding, Chiprate processing, and Matrix
            Inversion operations
          . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit
            with ECC, up to 400-MHz clock/800 MHz data rate
          . Dedicated security engine featuring trusted boot
          . DMA controller
          . OCNDMA with four bidirectional channels
          . Interfaces
          . Two triple-speed Gigabit Ethernet controllers featuring network
            acceleration including IEEE 1588. v2 hardware support and
            virtualization (eTSEC)
          . eTSEC 1 supports RGMII/RMII
          . eTSEC 2 supports RGMII
          . High-speed USB 2.0 host and device controller with ULPI interface
          . Enhanced secure digital (SD/MMC) host controller (eSDHC)
          . Antenna interface controller (AIC), supporting three industry standard
            JESD207/three custom ADI RF interfaces (two dual port and one single
            port) and three MAXIM's MaxPHY serial interfaces
          . ADI lanes support both full duplex FDD support and half duplex TDD
            support
          . Universal Subscriber Identity Module (USIM) interface that facilitates
            communication to SIM cards or Eurochip pre-paid phone cards
          . TDM with one TDM port
          . Two DUART, four eSPI, and two I2C controllers
          . Integrated Flash memory controller (IFC)
          . TDM with 256 channels
          . GPIO
          . Sixteen 32-bit timers
      
      The DSP portion of the SoC consists of DSP core (SC3850) and various
      accelerators pertaining to DSP operations.
      
       BSC9131RDB Overview
       ----------------------
          BSC9131 SoC
          1Gbyte DDR3 (on board DDR)
          128Mbyte 2K page size NAND Flash
          256 Kbit M24256 I2C EEPROM
          128 Mbit SPI Flash memory
          USB-ULPI
          eTSEC1: Connected to RGMII PHY
          eTSEC2: Connected to RGMII PHY
          DUART interface: supports one UARTs up to 115200 bps for console display
      
       Linux runs on e500v2 core and access some DSP peripherals like AIC
      Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>
      Signed-off-by: NPriyanka Jain <Priyanka.Jain@freescale.com>
      Signed-off-by: NAkhil Goyal <Akhil.Goyal@freescale.com>
      Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
      Signed-off-by: NRajan Srivastava <rajan.srivastava@freescale.com>
      Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      d729b900
    • T
      Revert "powerpc/p3060qds: Add support for P3060QDS board" · ab2aba47
      Timur Tabi 提交于
      This reverts commit 96cc017c.
      
      The P3060 was cancelled before it went into production, so there's no point
      in supporting it.
      Signed-off-by: NTimur Tabi <timur@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      ab2aba47
  14. 20 4月, 2012 1 次提交
  15. 17 3月, 2012 4 次提交
  16. 16 3月, 2012 4 次提交
  17. 23 2月, 2012 3 次提交
  18. 18 1月, 2012 1 次提交
  19. 05 1月, 2012 1 次提交