1. 18 12月, 2013 1 次提交
  2. 14 12月, 2013 1 次提交
  3. 11 12月, 2013 2 次提交
    • D
      xhci: clarify logging in xhci_setup_device · 6f8ffc0b
      Dan Williams 提交于
      Specify whether we are only performing the context setup portion of the
      'address device' command, or the full operation issuing 'SetAddress'
      on the wire.
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      6f8ffc0b
    • D
      usb: xhci: change enumeration scheme to 'new scheme' by default · 48fc7dbd
      Dan Williams 提交于
      Change the default enumeration scheme for xhci attached non-SuperSpeed
      devices from:
      
         Reset
         SetAddress [xhci address-device BSR = 0]
         GetDescriptor(8)
         GetDescriptor(18)
      
      ...to:
      
         Reset
         [xhci address-device BSR = 1]
         GetDescriptor(64)
         Reset
         SetAddress [xhci address-device BSR = 0]
         GetDescriptor(18)
      
      ...as some devices misbehave when encountering a SetAddress command
      prior to GetDescriptor.  There are known legacy devices that require
      this scheme, but testing has found at least one USB3 device that fails
      enumeration when presented with this ordering.  For now, follow the ehci
      case and enable 'new scheme' by default for non-SuperSpeed devices.
      
      To support this enumeration scheme on xhci the AddressDevice operation
      needs to be performed twice.  The first instance of the command enables
      the HC's device and slot context info for the device, but omits sending
      the device a SetAddress command (BSR == block set address request).
      Then, after GetDescriptor completes, follow up with the full
      AddressDevice+SetAddress operation.
      
      As mentioned before, this ordering of events with USB3 devices causes an
      extra state transition to be exposed to xhci.  Previously USB3 devices
      would transition directly from 'enabled' to 'addressed' and never need
      to underrun responses to 'get descriptor'. We do see the 64-byte
      descriptor fetch the correct data, but the following 18-byte descriptor
      read after the reset gets:
      
      bLength            = 0
      bDescriptorType    = 0
      bcdUSB             = 0
      bDeviceClass       = 0
      bDeviceSubClass    = 0
      bDeviceProtocol    = 0
      bMaxPacketSize0    = 9
      
      instead of:
      
      bLength            = 12
      bDescriptorType    = 1
      bcdUSB             = 300
      bDeviceClass       = 0
      bDeviceSubClass    = 0
      bDeviceProtocol    = 0
      bMaxPacketSize0    = 9
      
      which results in the discovery process looping until falling back to
      'old scheme' enumeration.
      Acked-by: NAlan Stern <stern@rowland.harvard.edu>
      Reported-by: NDavid Moore <david.moore@gmail.com>
      Suggested-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      48fc7dbd
  4. 10 12月, 2013 1 次提交
  5. 09 12月, 2013 9 次提交
  6. 05 12月, 2013 2 次提交
    • F
      USB: fix coccinelle warnings · 2e30d14f
      Fengguang Wu 提交于
      drivers/usb/host/ehci-mv.c:181:26-27: WARNING comparing pointer to 0, suggest !E
      /c/kernel-tests/src/cocci/drivers/usb/host/ehci-mv.c:181:26-27: WARNING comparing pointer to 0
      
       Compare pointer-typed values to NULL rather than 0
      
      Semantic patch information:
       This makes an effort to choose between !x and x == NULL.  !x is used
       if it has previously been used with the function used to initialize x.
       This relies on type information.  More type information can be obtained
       using the option -all_includes and the option -I to specify an
       include path.
      
      Generated by: coccinelle/null/badzero.cocci
      
      CC: Jingoo Han <jg1.han@samsung.com>
      CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Signed-off-by: NFengguang Wu <fengguang.wu@intel.com>
      2e30d14f
    • J
      USB: remove DEFINE_PCI_DEVICE_TABLE macro · 2fd3f651
      Jingoo Han 提交于
      Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro
      is not preferred.
      Signed-off-by: NJingoo Han <jg1.han@samsung.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      2fd3f651
  7. 04 12月, 2013 22 次提交
  8. 03 12月, 2013 2 次提交
    • X
      xhci: replace xhci_write_64() with writeq() · 7dd09a1a
      Xenia Ragiadakou 提交于
      Function xhci_write_64() is used to write 64bit xHC registers residing in MMIO.
      On 32bit systems, xHC registers need to be written with 32bit accesses by
      writing first the lower 32bits and then the higher 32bits. The header file
      asm-generic/io-64-nonatomic-lo-hi.h ensures that on 32bit systems writeq() will
      will write 64bit registers in 32bit chunks with low-high order.
      
      Replace all calls to xhci_write_64() with calls to writeq().
      
      This is done to reduce code duplication since 64bit low-high write logic
      is already implemented and to take advantage of inherent "atomic" 64bit
      write operations on 64bit systems.
      Signed-off-by: NXenia Ragiadakou <burzalodowa@gmail.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      7dd09a1a
    • X
      xhci: replace xhci_read_64() with readq() · e8b37332
      Xenia Ragiadakou 提交于
      Function xhci_read_64() is used to read 64bit xHC registers residing in MMIO.
      On 32bit systems, xHC registers need to be read with 32bit accesses by
      reading first the lower 32bits and then the higher 32bits.
      
      Replace all calls to xhci_read_64() with calls to readq() and include
      asm-generic/io-64-nonatomic-lo-hi.h header file, so that if the system
      is not 64bit, readq() will read registers in 32bit chunks with low-high order.
      
      This is done to reduce code duplication since 64bit low-high read logic
      is already implemented and to take advantage of inherent "atomic" 64bit
      read operations on 64bit systems.
      Signed-off-by: NXenia Ragiadakou <burzalodowa@gmail.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      e8b37332