- Code Optimization of s2io_isr function.
- Isr check using per device napi variable instead of driver global.
- Reduced from 3 to 1 if condition before check for processing packet receive
  packets.
- Implemented Jeff's comment to use synchronize_irq. Removed the isr_cnt
  variable as it became redundant.
- One time de assert the interrupts by writing all F's to the general_int_mask
  register instead of de asserting by clearing the source of interrupts with
  multiple writes which causes loss of interrupts (race conditions). It is
  entirely possible that before the driver has a chance to mask the asserted
  alarm bit, another alarm/traffic interrupt bit gets asserted as well. In
  this case Herc will keep the INTA line asserted and the bridge will not
  send a new Assert_INTA message upstream.

[ Resolved conflicts due to napi_struct changes... -DaveM ]
Signed-off-by: NSivakumar Subramani <sivakumar.subramani@neterion.com>
Signed-off-by: NSantosh Rastapur <santosh.rastapur@neterion.com>
Signed-off-by: NRamkrishna Vepa <ram.vepa@neterion.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

- Added check to return from the traffic handling function, if the card status
  is DOWN.
- Implemented Jeff's comments on incorrect return value in s2io_poll function.
Signed-off-by: NSivakumar Subramani <sivakumar.subramani@neterion.com>
Signed-off-by: NSantosh Rastapur <santosh.rastapur@neterion.com>
Signed-off-by: NRamkrishna Vepa <ram.vepa@neterion.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

- Removed the unused variable, intr_type, in device private structure.

[ Resolve conflicts with napi_struct changes... -DaveM ]
Signed-off-by: NSivakumar Subramani <sivakumar.subramani@neterion.com>
Signed-off-by: NSantosh Rastapur <santosh.rastapur@neterion.com>
Signed-off-by: NRamkrishna Vepa <ram.vepa@neterion.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

- Added support to poll entire set of device errors and alarams.
- A note on how device errors and alarms are handled:
- The adapter will automatically recover from uncorrectable ECC errors.
  Packets containing corrupted data will be dropped (not transmitted) or tagged
  as invalid before being passed to the host.
- The adapter cannot recover from any internal state machine errors. A state
  machine error requires a device reset.
- Any internal error that could potentially result in .store trampling.
  (undesirable PCI behaviour)is tagged as a "serious error". In such cases
  the adapter will give up its ability to be a bus master. In this situation
  the host will still be able to read internal device registers in order to
  generate an error report. A device reset is necessary to return to normal
  operation.
- In the event of a pcix data parity error, the adapter will automatically
  disable itself. Adapter_En will automatically transition from '1' to '0' and
  the adapter will enter its clean-up routine. Once the device has achieved
  quiescence, an adapter reset should be performed.
- Replaced alarm_intr_handler() with s2io_handle_errors().
- Added statistic counters to monitor the alarms.

[ Fix warnings wrt. do_s2io_chk_alarm_bit(), Callers pass in an
  "unsigned long long *" but the function takes a "u64 *" which is
  different on many 64-bit platforms. -DaveM ]
Signed-off-by: NSivakumar Subramani <sivakumar.subramani@neterion.com>
Signed-off-by: NSantosh Rastapur <santosh.rastapur@neterion.com>
Signed-off-by: NRamkrishna Vepa <ram.vepa@neterion.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

- Added support to unmask entire set of device errors and alarams.
        Alarm interrupts are generated for a myriad of purposes, ranging from
  illegal operations or requests to internal state machine errors and
  uncorrectable data corruption errors. In several cases the adapter can
  recover gracefully from unexpected events; however, in some cases, a device
  reset may be necessary. This patch handles alarms generated by all the
  blocks within the device.

  The adapter generates the following types of alarms:
        1. Link state transitions (local/remote fault) or other link-related
           problems.
        2. Problems with any device peripherals, including the EEPROM, FLASH,
           etc.
        3. Correctable ECC errors (single-bit errors) on internal data
           structures or frame data.
        4. Uncorrectable ECC errors (multi-bit errors) on internal data
           structures or frame data.
        5. State machine errors, which indicate that internal control
           structures have become corrupted.
        6. PCI related errors, including parity errors or illegal transactions.
        7. Other unexpected events.

- Implemented Jeff's review comments to use do_s2io_write_bits function to avoid
  duplicate codes.
Signed-off-by: NSivakumar Subramani <sivakumar.subramani@neterion.com>
Signed-off-by: NSantosh Rastapur <santosh.rastapur@neterion.com>
Signed-off-by: NRamkrishna Vepa <ram.vepa@neterion.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

remove setup platform device from jazzsonic, which is done in arch code now
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

The sgiseeq driver is one of the few remaining users of the ancient
cache banging DMA API.  Replaced with the modern days DMA API.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

The new microcode engine version is set to 1.1.0
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

add driver recognition for T3C rev board.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Currently, the driver only tries up to 5 times (5us) to get the results
of a CQ context operation.  Testing has shown the chip can take as much
as 50us to return the response on SG_CONTEXT_CMD operations.  So we up
the retry count to 100 to cover high loads.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

The cxgb3 driver is incorrectly configuring the HW CQ context for CQ's
that use overflow-avoidance.  Namely the RDMA control CQ.  This results
in a bad DMA from the device to bus address 0.  The solution is to set
the CQ_ERR bit in the context for these types of CQs.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Qualify toggling of xgmac tx enable with not getting pause frames,
we might not make forward progress because the peer is sending
lots of pause frames.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Clear pciE PEX errors late at module load time.
Log details when PEX errors occur.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Update firmware version.
Allow the driver to be up and running with older FW image
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Since E100 timer is 2HZ, use rounding to make timer occur on the
correct boundary.
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

This patch adds support for the Intel 82598 PCI-Express 10GbE
chipset. Devices will be available on the market soon.

This version of the driver is largely the same as the last release:

  * Driver uses a single RX and single TX queue, each using 1 MSI-X
  irq vector.
  * Driver runs in NAPI mode only
  * Driver is largely multiqueue-ready (TM)

Changes since 20070803:
  * removed wrappers for hardware functions
  * incorporated e1000e-style HW api reorganization code
  * sparse/checkpatch cleanups, namespace cleanups
  * driver prints out extra debugging information at load time
    identifying adapter board number, mac, phy types
  * removed ixgbe_api.c, ixgbe_api.h, ixgbe_osdep.h
  * driver update to 1.1.18
  * removed ixgbe.txt which contained no useful info anymore

[ Integrated napi_struct changes from Auke as well... -DaveM ]
Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: NAyyappan Veeraiyan <ayyappan.veeraiyan@intel.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Removed the workaround that was needed for PS3 firmware versions
prior to the first release.
Signed-off-by: NMasakazu Mokuno <mokuno@sm.sony.co.jp>
CC: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

The PS3 virtual network device requires a vlan tag in the sending packet
to select the destination device, ethernet port or wireless.
As the vlan tag field is in the middle of the passed data,
we should insert it into the packet data.
To avoid copying much of the packet data, the driver used two tx descriptors
for one tx skb; one descriptor was for sending a small static
buffer which contained vlan tag and copied header (two mac addresses),
one was for the residual data after the vlan field.

This patch changes the way to insert the vlan tag.  By changing
netdev->hard_header_len, we can make the headroom for moving mac address
fields in the skb buffer. Then we can send one tx skb with
one tx descriptor.  This also gives us a tx throughut gain of approx.
20% according to netperf results.
Signed-off-by: NMasakazu Mokuno <mokuno@sm.sony.co.jp>
CC: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Unfortunately there's no timeout for how long a packet can sit on
the TX ring after completion before an interrupt is generated, and
we want to have a threshold that's larger than one packet per interrupt.

So we have to have a timer that occasionally cleans the TX ring even
though there hasn't been an interrupt. Instead of setting up a dedicated
timer for this, just clean it in the NAPI poll routine instead.

[ Resolved conflicts with napi_struct changes... -DaveM ]
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Enable LLTX on pasemi_mac: we're already doing sufficient locking
in the driver to enable it.

[ Resolved merge conflicts with napi_struct changes... -DaveM ]
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

RX side flag to use is CHECKSUM_UNNECESSARY, not CHECKSUM_COMPLETE.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

The old logic didn't detect full (tx) ring cases properly, causing
overruns and general badness. Clean it up a bit and abstract out the
ring size checks, always making sure to leave 1 slot open.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Postpone pci unmap and skb free of the transmitted buffers to outside of
the tx ring lock, batching them up 32 at a time.

Also increase the count threshold to 128.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Various RX performance tweaks, do some explicit prefetching of packet
data, etc.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Fix up memcpy for short receives.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Enable settings to target l2 for the first few cachelines of the packet, since
we'll access them to get to the various headers.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Move away from using the pci config access functions for simple register
access.  Our device has all of the registers in the config space (hey,
from the hardware point of view it looks reasonable :-), so we need to
somehow get to it. Newer firmwares have it in the device tree such that
we can just get it and ioremap it there (in case it ever moves in future
products). For now, provide a hardcoded fallback for older firmwares.

[ Resolved napi_struct conflicts... -DaveM ]
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Abstract out the PCI config read/write accesses into reg read/write ones,
still calling the pci accessors on the back end.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

NetworkManager will not start dhcpd on an interface unless it reports
link-up state via ethtool.
Signed-off-by: NOlaf Hering <olaf@aepfle.de>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Use the PCI layer config access functions. The driver was using the
memory mapped window in device, to workaround issues accessing the
advanced error reporting registers.
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Use the kernel interfaces for advanced error reporting.
This should be cleaner and clear up errors on boot.

For those systems with busted BIOS's that don't correctly
support mmconfig, advanced error reporting will be disabled.
The PCI registers for advanced error reporting start at 0x100 which
is too large to be accessed by legacy functions.
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Take out the code that protects driver from accessing the
PCI config space.
We are old enough to run with scissors now.
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Add documentation of GPHY_CTRL register bits even if driver
is not using them (yet).
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Use debugfs rename to handle device neame changes.
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Set PM1 internal memory to round robin mode
It balances access to this internal memory for multiport adapters.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Log HW serial number when cxgb3 module is loaded.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Stop the MAC when a fatal error is detected.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Enforce validity checks on connection ids
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

A HW issue requires limiting the receive window size
to 23 pages of internal memory.
These pages can be configured to different sizes,
thus the RDMA driver needs to know the
page size to enforce the upper limit.

Also assign explicit enum values.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Send small TX_DATA work requests as immediate data even when
there are fragments. this avoids doing multiple DMAs for
small fragmented packets.
The driver already implements this optimization for small
contiguous packets.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>