Move apparently misplaced read_sff_dma_status() method from 'struct ide_tp_ops'
to 'struct ide_dma_ops', renaming it to dma_sff_read_status() and making only
required for SFF-8038i compatible IDE controller drivers (greatly cutting down
the number of initializers) as its only user (outside ide-dma-sff.c and such
drivers) appears to be ide_pci_check_simplex() which is only called for such
controllers...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

* Merge ide_hwgroup_t with ide_hwif_t.

* Cleanup init_irq() accordingly, then remove no longer needed
  ide_remove_port_from_hwgroup() and ide_ports[].

* Remove now unused HWGROUP() macro.

While at it:

* ide_dump_ata_error() fixups

v2:
* Fix ->quirk_list check in do_ide_request()
  (s/hwif->cur_dev/prev_port->cur_dev).
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

* Set chipset type explicitly in tx4938ide and tx4939ide host drivers
  (all other host drivers were updated already).

* Remove no longer used chipset type fixup from ide_host_register().
Acked-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

Trivial CodingStyle fixup for tx4938ide and tx4939ide drivers.
Acked-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NSergei Shtyltov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

This fixes data corruption on PIO mode.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: stable <stable@kernel.org>
Cc: sshtylyov@ru.mvista.com
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

This fixes data corruption on some heavy load.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: stable <stable@kernel.org>
Cc: sshtylyov@ru.mvista.com
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>

This is the driver for the Toshiba TX4939 SoC ATA controller.

This controller has standard ATA taskfile registers and DMA
command/status registers, but the register layout is swapped on big
endian.  There are some other endian issue and some special registers
which requires many custom dma_ops/tp_ops routines and build_dmatable.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: ralf@linux-mips.org
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>