1. 23 7月, 2015 1 次提交
    • R
      ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc · 9a258afa
      Roger Quadros 提交于
      For hwmods without sysc, _init_mpu_rt_base(oh) won't be called and so
      _find_mpu_rt_port(oh) will return NULL thus preventing ready state check
      on those modules after the module is enabled.
      
      This can potentially cause a bus access error if the module is accessed
      before the module is ready.
      
      Fix this by unconditionally calling _init_mpu_rt_base() during hwmod
      _init(). Do ioremap only if we need SYSC access.
      
      Eventhough _wait_target_ready() check doesn't really need MPU RT port but
      just the PRCM registers, we still mandate that the hwmod must have an
      MPU RT port if ready state check needs to be done. Else it would mean that
      the module is not accessible by MPU so there is no point in waiting
      for target to be ready.
      
      e.g. this fixes the below DCAN bus access error on AM437x-gp-evm.
      
      [   16.672978] ------------[ cut here ]------------
      [   16.677885] WARNING: CPU: 0 PID: 1580 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x234/0x35c()
      [   16.687946] 44000000.ocp:L3 Custom Error: MASTER M2 (64-bit) TARGET L4_PER_0 (Read): Data Access in User mode during Functional access
      [   16.700654] Modules linked in: xhci_hcd btwilink ti_vpfe dwc3 videobuf2_core ov2659 bluetooth v4l2_common videodev ti_am335x_adc kfifo_buf industrialio c_can_platform videobuf2_dma_contig media snd_soc_tlv320aic3x pixcir_i2c_ts c_can dc
      [   16.731144] CPU: 0 PID: 1580 Comm: rpc.statd Not tainted 3.14.26-02561-gf733aa036398 #180
      [   16.739747] Backtrace:
      [   16.742336] [<c0011108>] (dump_backtrace) from [<c00112a4>] (show_stack+0x18/0x1c)
      [   16.750285]  r6:00000093 r5:00000009 r4:eab5b8a8 r3:00000000
      [   16.756252] [<c001128c>] (show_stack) from [<c05a4418>] (dump_stack+0x20/0x28)
      [   16.763870] [<c05a43f8>] (dump_stack) from [<c0037120>] (warn_slowpath_common+0x6c/0x8c)
      [   16.772408] [<c00370b4>] (warn_slowpath_common) from [<c00371e4>] (warn_slowpath_fmt+0x38/0x40)
      [   16.781550]  r8:c05d1f90 r7:c0730844 r6:c0730448 r5:80080003 r4:ed0cd210
      [   16.788626] [<c00371b0>] (warn_slowpath_fmt) from [<c027fa94>] (l3_interrupt_handler+0x234/0x35c)
      [   16.797968]  r3:ed0cd480 r2:c0730508
      [   16.801747] [<c027f860>] (l3_interrupt_handler) from [<c0063758>] (handle_irq_event_percpu+0x54/0x1bc)
      [   16.811533]  r10:ed005600 r9:c084855b r8:0000002a r7:00000000 r6:00000000 r5:0000002a
      [   16.819780]  r4:ed0e6d80
      [   16.822453] [<c0063704>] (handle_irq_event_percpu) from [<c00638f0>] (handle_irq_event+0x30/0x40)
      [   16.831789]  r10:eb2b6938 r9:eb2b6960 r8:bf011420 r7:fa240100 r6:00000000 r5:0000002a
      [   16.840052]  r4:ed005600
      [   16.842744] [<c00638c0>] (handle_irq_event) from [<c00661d8>] (handle_fasteoi_irq+0x74/0x128)
      [   16.851702]  r4:ed005600 r3:00000000
      [   16.855479] [<c0066164>] (handle_fasteoi_irq) from [<c0063068>] (generic_handle_irq+0x28/0x38)
      [   16.864523]  r4:0000002a r3:c0066164
      [   16.868294] [<c0063040>] (generic_handle_irq) from [<c000ef60>] (handle_IRQ+0x38/0x8c)
      [   16.876612]  r4:c081c640 r3:00000202
      [   16.880380] [<c000ef28>] (handle_IRQ) from [<c00084f0>] (gic_handle_irq+0x30/0x5c)
      [   16.888328]  r6:eab5ba38 r5:c0804460 r4:fa24010c r3:00000100
      [   16.894303] [<c00084c0>] (gic_handle_irq) from [<c05a8d80>] (__irq_svc+0x40/0x50)
      [   16.902193] Exception stack(0xeab5ba38 to 0xeab5ba80)
      [   16.907499] ba20:                                                       00000000 00000006
      [   16.916108] ba40: fa1d0000 fa1d0008 ed3d3000 eab5bab4 ed3d3460 c0842af4 bf011420 eb2b6960
      [   16.924716] ba60: eb2b6938 eab5ba8c eab5ba90 eab5ba80 bf035220 bf07702c 600f0013 ffffffff
      [   16.933317]  r7:eab5ba6c r6:ffffffff r5:600f0013 r4:bf07702c
      [   16.939317] [<bf077000>] (c_can_plat_read_reg_aligned_to_16bit [c_can_platform]) from [<bf035220>] (c_can_get_berr_counter+0x38/0x64 [c_can])
      [   16.952696] [<bf0351e8>] (c_can_get_berr_counter [c_can]) from [<bf010294>] (can_fill_info+0x124/0x15c [can_dev])
      [   16.963480]  r5:ec8c9740 r4:ed3d3000
      [   16.967253] [<bf010170>] (can_fill_info [can_dev]) from [<c0502fa8>] (rtnl_fill_ifinfo+0x58c/0x8fc)
      [   16.976749]  r6:ec8c9740 r5:ed3d3000 r4:eb2b6780
      [   16.981613] [<c0502a1c>] (rtnl_fill_ifinfo) from [<c0503408>] (rtnl_dump_ifinfo+0xf0/0x1dc)
      [   16.990401]  r10:ec8c9740 r9:00000000 r8:00000000 r7:00000000 r6:ebd4d1b4 r5:ed3d3000
      [   16.998671]  r4:00000000
      [   17.001342] [<c0503318>] (rtnl_dump_ifinfo) from [<c050e6e4>] (netlink_dump+0xa8/0x1e0)
      [   17.009772]  r10:00000000 r9:00000000 r8:c0503318 r7:ebf3e6c0 r6:ebd4d1b4 r5:ec8c9740
      [   17.018050]  r4:ebd4d000
      [   17.020714] [<c050e63c>] (netlink_dump) from [<c050ec10>] (__netlink_dump_start+0x104/0x154)
      [   17.029591]  r6:eab5bd34 r5:ec8c9980 r4:ebd4d000
      [   17.034454] [<c050eb0c>] (__netlink_dump_start) from [<c0505604>] (rtnetlink_rcv_msg+0x110/0x1f4)
      [   17.043778]  r7:00000000 r6:ec8c9980 r5:00000f40 r4:ebf3e6c0
      [   17.049743] [<c05054f4>] (rtnetlink_rcv_msg) from [<c05108e8>] (netlink_rcv_skb+0xb4/0xc8)
      [   17.058449]  r8:eab5bdac r7:ec8c9980 r6:c05054f4 r5:ec8c9980 r4:ebf3e6c0
      [   17.065534] [<c0510834>] (netlink_rcv_skb) from [<c0504134>] (rtnetlink_rcv+0x24/0x2c)
      [   17.073854]  r6:ebd4d000 r5:00000014 r4:ec8c9980 r3:c0504110
      [   17.079846] [<c0504110>] (rtnetlink_rcv) from [<c05102ac>] (netlink_unicast+0x180/0x1ec)
      [   17.088363]  r4:ed0c6800 r3:c0504110
      [   17.092113] [<c051012c>] (netlink_unicast) from [<c0510670>] (netlink_sendmsg+0x2ac/0x380)
      [   17.100813]  r10:00000000 r8:00000008 r7:ec8c9980 r6:ebd4d000 r5:eab5be70 r4:eab5bee4
      [   17.109083] [<c05103c4>] (netlink_sendmsg) from [<c04dfdb4>] (sock_sendmsg+0x90/0xb0)
      [   17.117305]  r10:00000000 r9:eab5a000 r8:becdda3c r7:0000000c r6:ea978400 r5:eab5be70
      [   17.125563]  r4:c05103c4
      [   17.128225] [<c04dfd24>] (sock_sendmsg) from [<c04e1c28>] (SyS_sendto+0xb8/0xdc)
      [   17.136001]  r6:becdda5c r5:00000014 r4:ecd37040
      [   17.140876] [<c04e1b70>] (SyS_sendto) from [<c000e680>] (ret_fast_syscall+0x0/0x30)
      [   17.148923]  r10:00000000 r8:c000e804 r7:00000122 r6:becdda5c r5:0000000c r4:becdda5c
      [   17.157169] ---[ end trace 2b71e15b38f58bad ]---
      
      Fixes: 6423d6df ("ARM: OMAP2+: hwmod: check for module address space during init")
      Signed-off-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: <stable@vger.kernel.org>
      9a258afa
  2. 02 6月, 2015 1 次提交
  3. 09 5月, 2015 2 次提交
  4. 02 3月, 2015 1 次提交
  5. 26 2月, 2015 1 次提交
  6. 27 1月, 2015 1 次提交
  7. 21 1月, 2015 1 次提交
  8. 18 1月, 2015 1 次提交
    • M
      ARM: OMAP: Work around hardcoded interrupts · 0fb22a8f
      Marc Zyngier 提交于
      Commit 9a1091ef ("irqchip: gic: Support hierarchy irq domain")
      changed the GIC driver to use a non-legacy IRQ domain on DT
      platforms. This patch assumes that DT-driven systems are getting
      all of their interrupts from device tree.
      
      Turns out that OMAP has quite a few hidden gems, and still uses
      hardcoded interrupts despite having fairly complete DTs.
      
      This patch attempts to work around these by offering a translation
      method that can be called directly from the hwmod code, if present.
      The same hack is sprinkled over PRCM and TWL.
      
      It isn't pretty, but it seems to do the job without having to add
      more hacks to the interrupt controller code.
      
      Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Acked-by: NNishanth Menon <nm@ti.com>
      [tony@atomide.com: updated to fix make randconfig issue]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      0fb22a8f
  9. 08 1月, 2015 1 次提交
  10. 20 11月, 2014 1 次提交
  11. 14 11月, 2014 1 次提交
    • F
      ARM: OMAP2+: hwmod: drop unnecessary list initialization · 79005fbd
      Felipe Balbi 提交于
      ml->node and sl->node are currently initialized
      by means of INIT_LIST_HEAD(). That initialiation
      is followed by a list_add() call.
      
      Looking at what both these functions do we will have:
      
      	ml->node.next = &ml->node;
      	ml->node.prev = &ml->node;
      	oi->master->master_ports.next.prev = &ml->node;
      	ml->node.next = &oi->master->master_ports.next;
      	ml->node.prev = &oi->master->master_ports;
      	oi->master->master_ports.next = &ml->node;
      
      from this, it's clear that both INIT_LIST_HEAD() calls
      are unnecessary and can be safely removed.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      79005fbd
  12. 27 10月, 2014 12 次提交
  13. 19 9月, 2014 1 次提交
  14. 18 9月, 2014 1 次提交
  15. 17 9月, 2014 1 次提交
    • T
      ARM: OMAP3: Fix I/O chain clock line assertion timed out error · 7db143b8
      Tony Lindgren 提交于
      We are getting "PRM: I/O chain clock line assertion timed out" errors
      on early omaps for device tree based booting. This is because we are
      unconditionally calling reconfigure_io_chain while legacy booting
      has omap3_has_io_chain_ctrl() checks in place in omap_hwmod.c.
      
      For device tree based booting, we are calling reconfigure_io_chain
      unconditionally from pinctrl framework. So we need to add a check for
      omap3_has_io_chain_ctrl() to avoid the errors for trying to access
      a register that does not exist.
      
      For es3.0, the documentation in "4.11.2 Device Off-Mode Configuration"
      just mentions PM_WKEN_WKUP[8] bit. For es3.1, there's a new chapter in
      documentation for "4.11.2.2 I/O Wake-Up Mechanism" that describes the
      PM_WKEN_WKUP[16] ST_IO_CHAIN bit. So PM_WKEN_WKUP[16] bit did not get
      added until in es3.1 probaly to fix issues with flakey wake-up events.
      
      We are doing proper checks for ST_IO_CHAIN already in id.c and with
      omap3_has_io_chain_ctrl(). For more information, see also commit
      b02b9172 ("ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock
      control detection").
      
      Let's fix the issue by selecting the right function during init for
      reconfigure_io_chain depending on the omap revision. For es3.0 and
      earlier we need to just toggle EN_IO. By doing this, we can move the
      check for omap3_has_io_chain_ctrl() from omap_hwmod.c to the init code
      in prm_3xxx.c. And then we can unconditionally call reconfigure_io_chain.
      
      Thanks to Paul Walmsley and Nishanth Menon for help with debugging the
      issue.
      
      Fixes: 30a69ef7 ("ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap")
      Cc: Kevin Hilman <khilman@kernel.org>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Reviewed-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7db143b8
  16. 28 8月, 2014 1 次提交
  17. 26 8月, 2014 1 次提交
    • T
      ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled · cc824534
      Tony Lindgren 提交于
      Looks like MUSB cable removal can cause wake-up interrupts to
      stop working for device tree based booting at least for UART3
      even as nothing is dynamically remuxed. This can be fixed by
      calling reconfigure_io_chain() for device tree based booting
      in hwmod code. Note that we already do that for legacy booting
      if the legacy mux is configured.
      
      My guess is that this is related to UART3 and MUSB ULPI
      hsusb0_data0 and hsusb0_data1 support for Carkit mode that
      somehow affect the configured IO chain for UART3 and require
      rearming the wake-up interrupts.
      
      In general, for device tree based booting, pinctrl-single
      calls the rearm hook that in turn calls reconfigure_io_chain
      so calling reconfigure_io_chain should not be needed from the
      hwmod code for other events.
      
      So let's limit the hwmod rearming of iochain only to
      HWMOD_FORCE_MSTANDBY where MUSB is currently the only user
      of it. If we see other devices needing similar changes we can
      add more checks for it.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: stable@vger.kernel.org # v3.16
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      cc824534
  18. 16 6月, 2014 1 次提交
  19. 08 5月, 2014 1 次提交
  20. 12 4月, 2014 1 次提交
  21. 20 2月, 2014 1 次提交
  22. 22 1月, 2014 1 次提交
    • S
      arch/arm/mach-omap2/omap_hwmod.c: use memblock apis for early memory allocations · b6cb5bab
      Santosh Shilimkar 提交于
      Switch to memblock interfaces for early memory allocator instead of
      bootmem allocator.  No functional change in beahvior than what it is in
      current code from bootmem users points of view.
      
      Archs already converted to NO_BOOTMEM now directly use memblock
      interfaces instead of bootmem wrappers build on top of memblock.  And
      the archs which still uses bootmem, these new apis just fallback to
      exiting bootmem APIs.
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Christoph Lameter <cl@linux-foundation.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Grygorii Strashko <grygorii.strashko@ti.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Johannes Weiner <hannes@cmpxchg.org>
      Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Michal Hocko <mhocko@suse.cz>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      b6cb5bab
  23. 18 1月, 2014 2 次提交
  24. 10 12月, 2013 2 次提交
    • N
      ARM: OMAP2+: hwmod: Fix usage of invalid iclk / oclk when clock node is not present · 0e7dc862
      Nishanth Menon 提交于
      commit dc75925d(OMAP: hwmod: Fix the missing braces) introduced
      missing braces, however, we just set return result if clk_get fail
      and we populate the error pointer in clk pointer and pass it along to
      clk_prepare. This is wrong. The intent seems to be retry remaining
      clocks if they are available and warn the ones we cant find clks for.
      
      With the current logic, we see the following crash:
      omap_hwmod: l3_main: cannot clk_get interface_clk emac_ick
      Unable to handle kernel NULL pointer dereference at virtual address 00000032
      pgd = c0004000
      [00000032] *pgd=00000000
      Internal error: Oops: 5 [#1] SMP ARM
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc1-00044-gcc9fd5a-dirty #19
      task: ce0c3440 ti: ce0c4000 task.ti: ce0c4000
      PC is at __clk_prepare+0x10/0x74
      LR is at clk_prepare+0x14/0x24
        <snip>
      [<c044d59c>] (__clk_prepare+0x10/0x74) from [<c044d9b0>] (clk_prepare+0x14/0x24)
      [<c044d9b0>] (clk_prepare+0x14/0x24) from [<c077d8c4>] (_init+0x24c/0x3bc)
      [<c077d8c4>] (_init+0x24c/0x3bc) from [<c0027328>] (omap_hwmod_for_each+0x34/0x5c)
      [<c0027328>] (omap_hwmod_for_each+0x34/0x5c) from [<c077dfa0>] (__omap_hwmod_setup_all+0x24/0x40)
      [<c077dfa0>] (__omap_hwmod_setup_all+0x24/0x40) from [<c0008928>] (do_one_initcall+0x38/0x168)
      [<c0008928>] (do_one_initcall+0x38/0x168) from [<c0771be8>] (kernel_init_freeable+0xfc/0x1cc)
      [<c0771be8>] (kernel_init_freeable+0xfc/0x1cc) from [<c0521064>] (kernel_init+0x8/0x110)
      [<c0521064>] (kernel_init+0x8/0x110) from [<c000e568>] (ret_from_fork+0x14/0x2c)
      Code: e92d4038 e2504000 01a05004 0a000005 (e5943034)
      
      So, just warn and continue instead of proceeding and crashing, with
      missing clock nodes/bad data, we will eventually fail, however we
      should now have enough information to identify the culprit.
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      0e7dc862
    • R
      ARM: OMAP2+: hwmod: Fix SOFTRESET logic · 313a76ee
      Roger Quadros 提交于
      In _ocp_softreset(), after _set_softreset() + write_sysconfig(),
      the hwmod's sysc_cache will always contain SOFTRESET bit set
      so all further writes to sysconfig using this cache will initiate
      a repeated SOFTRESET e.g. enable_sysc(). This is true for OMAP3 like
      platforms that have RESET_DONE status in the SYSSTATUS register and
      so the the SOFTRESET bit in SYSCONFIG is not automatically cleared.
      It is not a problem for OMAP4 like platforms that indicate RESET
      completion by clearing the SOFTRESET bit in the SYSCONFIG register.
      
      This repeated SOFTRESET is undesired and was the root cause of
      USB host issues on OMAP3 platforms when hwmod was allowed to do the
      SOFTRESET for the USB Host module.
      
      To fix this we clear the SOFTRESET bit and update the sysconfig
      register + sysc_cache using write_sysconfig().
      Signed-off-by: NRoger Quadros <rogerq@ti.com>
      Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> # Panda, BeagleXM
      [paul@pwsan.com: renamed _clr_softreset() to _clear_softreset()]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      313a76ee
  25. 07 12月, 2013 1 次提交
    • T
      ARM: OMAP2+: Fix overwriting hwmod data with data from device tree · 5e863c56
      Tony Lindgren 提交于
      We have some device tree properties where the ti,hwmod have multiple
      values:
      
      am33xx.dtsi:	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
      am4372.dtsi:	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
      dra7.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2";
      omap3.dtsi:	ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
      omap3.dtsi:	ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
      omap4.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
      omap5.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
      
      That's not correct way of doing things in this case because these are
      separate devices with their own address space, interrupts, SYSCONFIG
      registers and can set their PM states independently.
      
      So they should all be fixed up to be separate devices in the .dts files.
      
      We also have the related data removed for at least omap4 in commit
      3b9b1015 (ARM: OMAP4: hwmod data: Clean up the data file), so
      that data is wrongly initialized as null data.
      
      So we need to fix two bugs:
      
      1. We are only checking the first entry of the ti,hwmods property
      
         This means that we're only initializing the first hwmods entry
         instead of the ones listed in the ti,hwmods property.
      
      2. We are only checking the child nodes, not the nodes themselves
      
         This means that anything listed at OCP level is currently just
         ignored and unitialized and at least the omap4 case, with the
         legacy data missing from the hwmod.
      
      Fix both of the issues by using an index to the ti,hwmods property
      and changing the hwmod lookup function to also check the current node
      for ti,hwmods property instead of just the children.
      
      While at it, let's also add some warnings for the bad data so it's
      easier to fix.
      
      Cc: "Benoît Cousson" <bcousson@baylibre.com>
      Acked-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      5e863c56
  26. 14 10月, 2013 1 次提交