1. 02 3月, 2007 2 次提交
    • T
      ahci/pata_jmicron: match class not function number · e34bb370
      Tejun Heo 提交于
      Make jmiron_ata quirk update pdev->class after programming the device
      and update ahci and pata_jmicron such that they match class code
      instead of checking function number manually.  For ahci, it matches
      for vendor and class.  For pata_jmicron, it matches vendor, device and
      class as IDE class isn't as well defined as AHCI class.
      
      This makes jmicron device matching more conventional and script
      friendly.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      e34bb370
    • T
      jmicron ATA: reimplement jmicron ATA quirk · 5ee2ae7f
      Tejun Heo 提交于
      Reimplement jmicron ATA quirk.
      
      * renamed to quirk_jmicron_ata()
      * quirk is invoked only for the affected controllers
      * programming is stricter.  e.g. conf5 bit24 is cleared if
        unnecessary.
      * code factored for readability
      * JMB360 and JMB368 are programmed into proper mode
      
      Verified on JMB360, 363 and 368.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      5ee2ae7f
  2. 10 2月, 2007 1 次提交
  3. 08 2月, 2007 6 次提交
  4. 03 2月, 2007 1 次提交
    • T
      ahci/pata_jmicron: fix JMicron quirk · 77280989
      Tejun Heo 提交于
      For all JMicrons except for 361 and 368, AHCI mode enable bits in the
      Control(1) should be set.  This used to be done in both ahci and
      pata_jmicron but while moving programming to PCI quirk, it was removed
      from ahci part while still left in pata_jmicron.
      
      The implemented JMicron PCI quirk was incorrect in that it didn't
      program AHCI mode enable bits.  If pata_jmicron is loaded first and
      programs those bits, the ahci ports work; otherwise, ahci device
      detection fails miserably.
      
      This patch makes JMicron PCI quirk clear SATA IDE mode bits and set
      AHCI mode bits and remove the respective part from pata_jmicron.
      Tested on JMB361, 363 and 368.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      77280989
  5. 02 2月, 2007 1 次提交
  6. 31 1月, 2007 1 次提交
  7. 23 1月, 2007 1 次提交
  8. 11 1月, 2007 1 次提交
    • V
      [PATCH] x86-64: pci quirks MODPOST warning fix · 9d24a81e
      Vivek Goyal 提交于
      o MODPOST generates warnings for i386 if kernel is compiled with
        CONFIG_RELOCATABLE=y
      
      WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc_ich6' (at offset 0xc0217d58) and 'quirk_cardbus_legacy'
      WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc' (at offset 0xc0217fd9) and 'pci_match_id'
      
      o Two quirk functions which are non __init, are accessing data which is
        of type __init.
      Signed-off-by: NVivek Goyal <vgoyal@in.ibm.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      9d24a81e
  9. 10 1月, 2007 1 次提交
  10. 21 12月, 2006 5 次提交
  11. 02 12月, 2006 1 次提交
    • A
      PCI: quirks: fix the festering mess that claims to handle IDE quirks · 368c73d4
      Alan Cox 提交于
      The number of permutations of crap we do is amazing and almost all of it
      has the wrong effect in 2.6.
      
      At the heart of this is the PCI SFF magic which says that compatibility
      mode PCI IDE controllers use ISA IRQ routing and hard coded addresses
      not the BAR values. The old quirks variously clears them, sets them,
      adjusts them and then IDE ignores the result.
      
      In order to drive all this garbage out and to do it portably we need to
      handle the SFF rules directly and properly. Because we know the device
      BAR 0-3 are not used in compatibility mode we load them with the values
      that are implied (and indeed which many controllers actually
      thoughtfully put there in this mode anyway).
      
      This removes special cases in the IDE layer and libata which now knows
      that bar 0/1/2/3 always contain the correct address. It means our
      resource allocation map is accurate from boot, not "mostly accurate"
      after ide is loaded, and it shoots lots of code. There is also lots more
      code and magic constant knowledge to shoot once this is in and settled.
      
      Been in my test tree for a while both with drivers/ide and with libata.
      Wants some -mm shakedown in case I've missed something dumb or there are
      corner cases lurking.
      Signed-off-by: NAlan Cox <alan@redhat.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      368c73d4
  12. 15 11月, 2006 1 次提交
  13. 28 10月, 2006 2 次提交
  14. 24 10月, 2006 1 次提交
    • L
      Revert unintentional and bogus change to drivers/pci/quirks.c · 0c0e4668
      Linus Torvalds 提交于
      In commit 4e8a5201 ("[PKT_SCHED] netem:
      Orphan SKB when adding to queue.") Davem mistakenly also included a
      temporary diff in his tree that disabled the pci_fixup_video VGA quirk,
      which broke sparc64.
      
      This reverts that part of the commit. Sayeth Davem:
      
        "Greg KH has a patch coming to you soon which will move that VGA code
         back into x86/x86_64/IA64 specific areas and will fix the sparc64
         problem properly."
      
      Special thanks to Claudio Martins <ctpm@ist.utl.pt> for noticing the
      error in the first place.
      
      Cc: Claudio Martins <ctpm@ist.utl.pt>
      Cc: David Miller <davem@davemloft.net>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      0c0e4668
  15. 23 10月, 2006 1 次提交
  16. 19 10月, 2006 4 次提交
  17. 01 10月, 2006 1 次提交
    • A
      [PATCH] PCI quirks update · 236561e5
      Alan Cox 提交于
      This fixes two things
      
      Firstly someone mistakenly used "errata" for the singular.  This causes
      Dave Woodhouse to emit diagnostics whenever the string is read, and so
      should be fixed.
      
      Secondly the AMD AGP tunnel has an erratum which causes hangs if you try
      and do direct PCI to AGP transfers in some cases.  We have a flag for
      PCI/PCI failures but we need a different flag for this really as in this
      case we don't want to stop PCI/PCI transfers using things like IOAT and the
      new RAID offload work.
      
      I'll post some updates to make proper use of the PCIAGP flag in the
      media/video drivers to Mauro.
      Signed-off-by: NAlan Cox <alan@redhat.com>
      Cc: David Woodhouse <dwmw2@infradead.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      236561e5
  18. 27 9月, 2006 2 次提交
  19. 01 9月, 2006 1 次提交
  20. 27 8月, 2006 1 次提交
  21. 20 8月, 2006 1 次提交
  22. 04 8月, 2006 1 次提交
  23. 26 7月, 2006 1 次提交
  24. 13 7月, 2006 2 次提交
    • K
      [PATCH] PCI: PCIE power management quirk · ffadcc2f
      Kristen Carlson Accardi 提交于
      When changing power states from D0->DX and then from DX->D0, some
      Intel PCIE chipsets will cause a device reset to occur.  This will
      cause problems for any D State other than D3, since any state
      information that the driver will expect to be present coming from
      a D1 or D2 state will have been cleared.  This patch addes a
      flag to the pci_dev structure to indicate that devices should
      not use states D1 or D2, and will set that flag for the affected
      chipsets.  This patch also modifies pci_set_power_state() so that
      when a device driver tries to set the power state on
      a device that is downstream from an affected chipset, or on one
      of the affected devices it only allows state changes to or
      from D0 & D3.  In addition, this patch allows the delay time
      between D3->D0 to be changed via a quirk.  These chipsets also
      need additional time to change states beyond the normal 10ms.
      Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ffadcc2f
    • M
      [PATCH] PCI: Clear abnormal poweroff flag on VIA southbridges, fix resume · 709cf5ea
      Matthew Garrett 提交于
      Some VIA southbridges contain a flag in the ACPI register space that
      indicates whether an abnormal poweroff has occured, presumably with the
      intention that it can be cleared on clean shutdown.  Some BIOSes check this
      flag at resume time, and will re-POST the system rather than jump back to
      the OS if it's set.  Clearing it at boot time appears to be sufficient.
      I'm not sure if drivers/pci/quirks.c is the right place to do it, but I'm
      not sure where would be cleaner.
      
      [akpm@osdl.org: cleanups, build fix]
      Signed-off-by: NMatthew Garrett <mjg59@srcf.ucam.org>
      Cc: Greg KH <greg@kroah.com>
      Cc: "Brown, Len" <len.brown@intel.com>
      Cc: "Yu, Luming" <luming.yu@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      709cf5ea