- 31 10月, 2007 1 次提交
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由 Russell King 提交于
Jon Eibertzon writes: > We have noticed that the I-cache is disabled while waiting for > interrupt in cpu_arm926_do_idle in arch/arm/mm/proc-arm926.S > and we are curious to know why, because this causes us a great > performance hit when executing in FIQ-handlers. Is it assumed > here that every individual FIQ-handler re-enables the I-cache? The I-cache disable is an errata workaround, so the solution is to disable FIQs across the section with the I-cache disabled. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 12月, 2006 1 次提交
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由 Russell King 提交于
L_PTE_ASID is not really required to be stored in every PTE, since we can identify it via the address passed to set_pte_at(). So, create set_pte_ext() which takes the address of the PTE to set, the Linux PTE value, and the additional CPU PTE bits which aren't encoded in the Linux PTE value. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 12月, 2006 1 次提交
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由 Russell King 提交于
Don't set HWCAP_VFP in the processor support file; not only does it depend on the processor features, but it also depends on the support code being present. Therefore, only set it if the support code detects that we have a VFP coprocessor attached. Also, move the VFP handling of the coprocessor access register into the VFP support code. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 30 11月, 2006 1 次提交
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由 Russell King 提交于
These files want to provide/access ELF hwcap information, so should be including asm/elf.h rather than asm/procinfo.h Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 9月, 2006 1 次提交
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由 Catalin Marinas 提交于
Patch from Catalin Marinas The ARM926EJ-S CPU has the VFP coprocessor and therefore it should be shown in the /proc/cpuinfo if CONFIG_VFP is enabled. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 7月, 2006 1 次提交
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由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 30 6月, 2006 1 次提交
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由 Russell King 提交于
On some CPUs, bit 4 of section mappings means "update the cache when written to". On others, this bit is required to be one, and others it's required to be zero. Finally, on ARMv6 and above, setting it turns on "no execute" and prevents speculative prefetches. With all these combinations, no one value fits all CPUs, so we have to pick a value depending on the CPU type, and the area we're mapping. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 6月, 2006 3 次提交
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由 Russell King 提交于
Most MMU-based CPUs have a restriction on the setting of the data cache enable and mmu enable bits in the control register, whereby if the data cache is enabled, the MMU must also be enabled. Enabling the data cache without the MMU is an invalid combination. However, there are CPUs where the data cache can be enabled without the MMU. In order to allow these CPUs to take advantage of that, provide a method whereby each proc-*.S file defines the control regsiter value for use with nommu (with the MMU disabled.) Later on, when we add support for enabling the MMU on these devices, we can adjust the "crval" macro to also enable the data cache for nommu. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The "id(wb)BRR" suffix reports which CPU debugging options were (or were not) selected at kernel build time. Rather than have every proc-*.S file implement this, report the control register value, from which this information can be deduced. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hyok S. Choi 提交于
In noMMU mode, various of functions which are defined in mm/proc-*.S is not valid or needed to be avoided. i.g. switch_mm is not needed, just returns and this makes the I & D caches are valid which shows great improvement of performance including task switching and IPC. Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 3月, 2006 2 次提交
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由 Russell King 提交于
asm/hardware.h is not required for the majority of processor support files, ioremap support, mm initialisation, acorn IO support, nor the debug code (which picks up its machine specific includes via debug-macros.S) Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Move the hardware PMD and PTE page table definitions from pgtable.h into pgtable-hwdef.h, and include pgtable-hwdef.h as necessary. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 9月, 2005 1 次提交
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由 Ben Dooks 提交于
Patch from Ben Dooks The `make buildcheck` is erroneously reporting that the .proc.info list is referencing items in the .init section as it is not itself postfixed with .init Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 4月, 2005 1 次提交
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由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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