1. 31 10月, 2007 1 次提交
    • R
      [ARM] Fix FIQ issue with ARM926 · 0214f922
      Russell King 提交于
      Jon Eibertzon writes:
      > We have noticed that the I-cache is disabled while waiting for
      > interrupt in cpu_arm926_do_idle in arch/arm/mm/proc-arm926.S
      > and we are curious to know why, because this causes us a great
      > performance hit when executing in FIQ-handlers. Is it assumed
      > here that every individual FIQ-handler re-enables the I-cache?
      
      The I-cache disable is an errata workaround, so the solution is to
      disable FIQs across the section with the I-cache disabled.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      0214f922
  2. 13 12月, 2006 1 次提交
    • R
      [ARM] Unuse another Linux PTE bit · ad1ae2fe
      Russell King 提交于
      L_PTE_ASID is not really required to be stored in every PTE, since we
      can identify it via the address passed to set_pte_at().  So, create
      set_pte_ext() which takes the address of the PTE to set, the Linux
      PTE value, and the additional CPU PTE bits which aren't encoded in
      the Linux PTE value.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      ad1ae2fe
  3. 09 12月, 2006 1 次提交
    • R
      [ARM] Handle HWCAP_VFP in VFP support code · efe90d27
      Russell King 提交于
      Don't set HWCAP_VFP in the processor support file; not only does it
      depend on the processor features, but it also depends on the support
      code being present.  Therefore, only set it if the support code
      detects that we have a VFP coprocessor attached.
      
      Also, move the VFP handling of the coprocessor access register into
      the VFP support code.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      efe90d27
  4. 30 11月, 2006 1 次提交
  5. 07 9月, 2006 1 次提交
  6. 01 7月, 2006 1 次提交
  7. 30 6月, 2006 1 次提交
    • R
      [ARM] Set bit 4 on section mappings correctly depending on CPU · 8799ee9f
      Russell King 提交于
      On some CPUs, bit 4 of section mappings means "update the
      cache when written to".  On others, this bit is required to
      be one, and others it's required to be zero.  Finally, on
      ARMv6 and above, setting it turns on "no execute" and prevents
      speculative prefetches.
      
      With all these combinations, no one value fits all CPUs, so we
      have to pick a value depending on the CPU type, and the area
      we're mapping.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8799ee9f
  8. 29 6月, 2006 3 次提交
  9. 22 3月, 2006 2 次提交
  10. 20 9月, 2005 1 次提交
  11. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4