- 17 5月, 2013 1 次提交
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由 Jingoo Han 提交于
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d063 (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 01 11月, 2012 1 次提交
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由 Alan Stern 提交于
This patch (as1623) removes the ehci_port_power() routine and all the places that call it. There's no reason for ehci-hcd to change the port power settings; the hub driver takes care of all that stuff. There is one exception: When the controller is resumed from hibernation or following a loss of power, the ports that are supposed to be handed over to a companion controller must be powered on first. Otherwise the handover won't work. This process is not visible to the hub driver, so it has to be handled in ehci-hcd. Signed-off-by: NAlan Stern <stern@rowland.harvard.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 7月, 2012 1 次提交
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由 Alan Stern 提交于
This patch (as1564c) converts the EHCI platform drivers to use the central ehci_setup() routine for generic controller initialization rather than each having its own idiosyncratic approach. The major point of difficulty lies in ehci-pci's many vendor- and device-specific workarounds. Some of them have to be applied before calling ehci_setup() and some after, which necessitates a fair amount of code motion. The other platform drivers require much smaller changes. One point not addressed by the patch is whether ports should be powered on or off following initialization. The different drivers appear to handle this pretty much at random. In fact it shouldn't matter, because the hub driver turns on power to all ports when it binds to the root hub. Straightening that out will be left for another day. Signed-off-by: NAlan Stern <stern@rowland.harvard.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 09 12月, 2011 1 次提交
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由 Geoff Levand 提交于
Remove the ehci_reset() call done in the ehci_run() routine of the USB EHCI host controller driver and add an ehci_reset() call to the probe processing of all EHCI platform drivers that do not already call ehci_reset(). The call to ehci_reset() from ehci_run() was problematic for several platform drivers, and unnecessary for others. This change moves the decision to call ehci_reset() at driver startup to the platform driver code. Signed-off-by: NGeoff Levand <geoff@infradead.org> Acked-by: NAlan Stern <stern@rowland.harvard.edu>
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- 18 9月, 2011 1 次提交
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由 Yong Zhang 提交于
This flag is a NOOP and can be removed now. Signed-off-by: NYong Zhang <yong.zhang0@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 10 6月, 2011 1 次提交
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由 Joe Perches 提交于
Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 04 5月, 2011 1 次提交
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由 Jan Andersson 提交于
The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: NJan Andersson <jan@gaisler.com> Acked-by: NAlan Stern <stern@rowland.harvard.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 30 10月, 2010 1 次提交
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由 David Daney 提交于
The OCTEON II SOC has USB EHCI and OHCI controllers connected directly to the internal I/O bus. This patch adds the necessary 'glue' logic to allow ehci-hcd and ohci-hcd drivers to work on OCTEON II. The OCTEON normally runs big-endian, and the ehci/ohci internal registers have host endianness, so we need to select USB_EHCI_BIG_ENDIAN_MMIO. The ehci and ohci blocks share a common clocking and PHY infrastructure. Initialization of the host controller and PHY clocks is common between the two and is factored out into the octeon2-common.c file. Setting of USB_ARCH_HAS_OHCI and USB_ARCH_HAS_EHCI is done in arch/mips/Kconfig in a following patch. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-usb@vger.kernel.org To: dbrownell@users.sourceforge.net Patchwork: http://patchwork.linux-mips.org/patch/1675/Acked-by: NGreg Kroah-Hartman <gregkh@suse.de> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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