- 24 2月, 2011 12 次提交
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由 Russell King 提交于
Move L1_CACHE_SHIFT related options together, rather than spreading them across two separate Kconfig files. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nicolas Pitre 提交于
Some installers would binary patch the kernel zImage to replace the first few nops with custom instructions. This breaks the Thumb2 kernel as the mode switch is right at the beginning. Let's move it towards the end of the nop sequence instead. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Improve the documentation for the VFP hotplug notifier handler, so that people better understand what's going on there and what has been done for them. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nicolas Pitre 提交于
In commit e616c591, highmem support was deactivated for SMP platforms without hardware TLB ops broadcast because usage of kmap_high_get() requires that IRQs be disabled when kmap_lock is locked which is incompatible with the IPI mechanism used by the software TLB ops broadcast invoked through flush_all_zero_pkmaps(). The reason for kmap_high_get() is to ensure that the currently kmap'd page usage count does not decrease to zero while we're using its existing virtual mapping in an atomic context. With a VIVT cache this is essential to do due to cache coherency issues, but with a VIPT cache this is only an optimization so not to pay the price of establishing a second mapping if an existing one can be used. However, on VIPT platforms without hardware TLB maintenance we can give up on that optimization in order to be able to use highmem. From ARMv7 onwards the TLB ops are broadcasted in hardware, so let's disable ARCH_NEEDS_KMAP_HIGH_GET only when CONFIG_SMP and CONFIG_CPU_TLB_V6 are defined. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Tested-by: NSaeed Bishara <saeed.bishara@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
This cleans up after the conversion to irq_data. Rename the function to match the method, and remove the now useless lookup of the irq descriptor which is never used. Move the bitmask calculation out of the irq_controller_lock region. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Ensure appropriate locks are taken to ensure that IRQ migration off the current CPU is race-free. We may have a concurrent set_affinity via procfs running on another CPU in parallel with the IRQ migration, resulting in unpredictable results. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The force argument to irq_set_affinity really should be 'true' as moving IRQs off a CPU which is going down isn't optional. Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Colin Tuckley 提交于
Add a missing call to pci_enable_bridges() so that devices behind bridges get found by the pci bus scan. Signed-off-by: NChris Partington <chris.partington@arm.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Current diagnostics are rather poor when things go wrong: ipv6: relocation out of range, section 2 reloc 0 sym 'snmp_mib_free' Let's include a little more information about the problem: ipv6: section 2 reloc 0 sym 'snmp_mib_free': relocation 28 out of range (0xbf0000a4 -> 0xc11b4858) so that we show exactly what the problem is - not only what type of relocation but also the offending address range too. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
We have 'install' and 'zinstall' for installing Image and zImage kernels, so add 'uinstall' to complete the set. This allows developers to have a ~/bin/installkernel script which (eg) copies the kernel to the tftp server automatically once the kernel has built, resulting in a better workflow. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
arch/arm/kernel/return_address.c:37:6: warning: symbol 'return_address' was not declared. Should it be static? arch/arm/kernel/setup.c:76:14: warning: symbol 'processor_id' was not declared. Should it be static? arch/arm/kernel/traps.c:259:1: warning: symbol 'die_lock' was not declared. Should it be static? arch/arm/vfp/vfpmodule.c:156:6: warning: symbol 'vfp_raise_sigfpe' was not declared. Should it be static? Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Achieve better usage of the DMA coherent region by doing top-down allocation rather than bottom up. If we ask for a 128kB allocation, this will be aligned to 128kB and satisfied from the very bottom address. If we then ask for a 600kB allocation, this will be aligned to 1MB, and we will have a 896kB hole. Performing top-down allocation resolves this by allocating the 128kB at the very top, and then the 600kB can come in below it without any unnecessary wastage. This problem was reported by Janusz Krzysztofik, who had 2 x 128kB + 1 x 640kB allocations which wouldn't fit into 1MB. Tested-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 2月, 2011 1 次提交
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由 Russell King 提交于
Since the debug macros no longer depend on the machine type information, the machine type lookup can be deferred to setup_arch() in setup.c which simplifies the code somewhat. We also move the __error_a functionality into setup.c for displaying a message when a bad machine ID is passed to the kernel via the LL debug code. We also log this into the kernel ring buffer which makes it possible to retrieve the message via a debugger. Original idea from Grant Likely. Acked-by: NGrant Likely <grant.likely@secretlab.ca> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 2月, 2011 1 次提交
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由 Russell King 提交于
Allow non-ARM SMP processors to use the SMP_ON_UP feature. CPUs supporting SMP must have the new CPU ID format, so check for this first. Then check for ARM11MPCore, which fails the MPIDR check. Lastly check the MPIDR reports multiprocessing extensions and that the CPU is part of a multiprocessing system. Cc: <stable@kernel.org> Reported-and-Tested-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 31 1月, 2011 3 次提交
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由 Russell King 提交于
Ensure that the ISA/PCI IO space accessors are properly ordered on ARMv6+ architectures. These should always be ordered with respect to all other accesses. This also fixes __iormb() and __iowmb() not being visible to ioread/ iowrite if a platform defines its own MMIO accessors. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Disable the initrd if the passed address already overlaps the reserved region. This avoids oopses on Netwinders when NeTTrom tells the kernel that an initrd is located at mem+4MB, but this overlaps the BSS, resulting in the kernels in-use BSS being freed. This should be applied to v2.6.37-stable. Cc: <stable@kernel.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
0ea12930 (arm: return both physical and virtual addresses from addruart) changed the way the 'addruart' worked, making it return both the virt and phys addresses. Unfortunately, for footbridge, these were reversed. Fix that. Tested on Netwinder. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 1月, 2011 5 次提交
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由 Julia Lawall 提交于
This code elsewhere returns a negative constant to an indicate an error, while IS_ERR returns the result of a >= operation. The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x; @@ if (...) { ... - return IS_ERR(x); + return PTR_ERR(x); } // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Felipe Balbi 提交于
Commit 8419fdba (omap2+: Add omap_mux_get_by_name) introduced the following compile warning: arch/arm/mach-omap2/mux.c: In function '_omap_mux_get_by_name': arch/arm/mach-omap2/mux.c:163:17: warning: 'found_mode' may be used uninitialized in this function Signed-off-by: NFelipe Balbi <balbi@ti.com> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Commit 03a9e512 (omap1: Use asm_irq_flags for entry-macro.S) added support for multi-omap builds with addition of the omap_irq_flags. Commit 9f9605c2 (omap2+: Fix unused variable warning for omap_irq_base) simplified omap2+ entry-macro.S by moving omap_irq_flags out of entry-macro.S. Simplify omap1 entry-macro.S in a similar way to keep the code consistent. Based on a similar earlier patch for omap2+ by Russell King <rmk+kernel@arm.linux.org.uk>. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Russell King 提交于
Commit 5d190c40 (omap2+: Initialize omap_irq_base for entry-macro.S from platform code) simplified the handling of omap_irq_base for multi-omap builds. However, this patch also introduced a build warning for !MULTI_OMAP2 builds: arch/arm/mach-omap2/io.c: In function 'omap_irq_base_init': arch/arm/mach-omap2/io.c:322: warning: unused variable 'omap_irq_base' Fix this by removing the ifdef. Also simplify things further by moving omap_irq_base out of entry-macro.S. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Stefano Stabellini 提交于
With this patch, the cpuidle driver does not load and does not issue the mwait operations. Instead the hypervisor is doing them (b/c we call the safe_halt pvops call). This fixes quite a lot of bootup issues wherein the user had to force interrupts for the continuation of the bootup. Details are discussed in: http://lists.xensource.com/archives/html/xen-devel/2011-01/msg00535.html [v2: Wrote the commit description] Reported-by: NDaniel De Graaf <dgdegra@tycho.nsa.gov> Tested-by: NDaniel De Graaf <dgdegra@tycho.nsa.gov> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- 27 1月, 2011 5 次提交
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由 Stefano Stabellini 提交于
Under Dell Inspiron 1525, and Intel SandyBridge SDP's the BIOS e820 RAM is not page-aligned: [ 0.000000] Xen: 0000000000100000 - 00000000df66d800 (usable) We were not handling that and ended up setting up a pagetable that included up to df66e000 with the disastrous effect that when memset(NODE_DATA(nodeid), 0, sizeof(pg_data_t)); tried to clear the page it would crash at the 2K mark. Initially reported by Michael Young @ http://lists.xensource.com/archives/html/xen-devel/2011-01/msg00108.html The fix is to page-align the size and also take into consideration the start of the E820 (in case that is not page-aligned either). This fixes the bootup failure on those affected machines. This patch is a rework of the Micheal A Young initial patch and considers the case if the start is not page-aligned. Reported-by: NMichael A Young <m.a.young@durham.ac.uk> Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: NMichael A Young <m.a.young@durham.ac.uk>
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由 Stefan Bader 提交于
In case the mfn_list does not have enough entries to fill a p2m page we do not want the entries from max_pfn up to the boundary to be filled with unknown values. Hence set them to INVALID_P2M_ENTRY. Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com>
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由 Colin Cross 提交于
A future patch will export gic_mask_irq and gic_unmask_irq. Rename the pointers in arch/arm/mach-tegra/irq.c to avoid a compile error. Signed-off-by: NColin Cross <ccross@android.com>
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由 Grant Likely 提交于
Commit 37337a8d, "ARM: tegra: irq_data conversion." missed changing one reference to 'irq' in the function tegra_gpio_irq_set_type(). This patch fixes the build error. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NLennert Buytenhek <buytenh@secretlab.ca> Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NColin Cross <ccross@android.com>
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- 26 1月, 2011 9 次提交
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由 Hans-Christian Egtvedt 提交于
This patch adds the linux/mm.h header file to the AVR32 arch pgalloc.c implementation to fix the undefined reference to pgtable_page_ctor() and pgtable_page_dtor(). Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
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由 Eric Dumazet 提交于
These recent percpu commits: 2485b646: x86,percpu: Move out of place 64 bit ops into X86_64 section 8270137a: cpuops: Use cmpxchg for xchg to avoid lock semantics Caused this 'perf top' crash: Kernel panic - not syncing: Fatal exception in interrupt Pid: 0, comm: swapper Tainted: G D 2.6.38-rc2-00181-gef71723 #413 Call Trace: <IRQ> [<ffffffff810465b5>] ? panic ? kmsg_dump ? kmsg_dump ? oops_end ? no_context ? __bad_area_nosemaphore ? perf_output_begin ? bad_area_nosemaphore ? do_page_fault ? __task_pid_nr_ns ? perf_event_tid ? __perf_event_header__init_id ? validate_chain ? perf_output_sample ? trace_hardirqs_off ? page_fault ? irq_work_run ? update_process_times ? tick_sched_timer ? tick_sched_timer ? __run_hrtimer ? hrtimer_interrupt ? account_system_vtime ? smp_apic_timer_interrupt ? apic_timer_interrupt ... Looking at assembly code, I found: list = this_cpu_xchg(irq_work_list, NULL); gives this wrong code : (gcc-4.1.2 cross compiler) ffffffff810bc45e: mov %gs:0xead0,%rax cmpxchg %rax,%gs:0xead0 jne ffffffff810bc45e <irq_work_run+0x3e> test %rax,%rax je ffffffff810bc4aa <irq_work_run+0x8a> Tell gcc we dirty eax/rax register in percpu_xchg_op() Compiler must use another register to store pxo_new__ We also dont need to reload percpu value after a jump, since a 'failed' cmpxchg already updated eax/rax Wrong generated code was : xor %rax,%rax /* load 0 into %rax */ 1: mov %gs:0xead0,%rax cmpxchg %rax,%gs:0xead0 jne 1b test %rax,%rax After patch : xor %rdx,%rdx /* load 0 into %rdx */ mov %gs:0xead0,%rax 1: cmpxchg %rdx,%gs:0xead0 jne 1b: test %rax,%rax Signed-off-by: NEric Dumazet <eric.dumazet@gmail.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: Tejun Heo <tj@kernel.org> LKML-Reference: <1295973114.3588.312.camel@edumazet-laptop> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Yinghai Lu 提交于
Left-over from the x86 merge ... Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <4D3E23D1.7010405@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Torben Hohn 提交于
The -rt patches change the console_semaphore to console_mutex. As a result, a quite large chunk of the patches changes all acquire/release_console_sem() to acquire/release_console_mutex() This commit makes things use more neutral function names which dont make implications about the underlying lock. The only real change is the return value of console_trylock which is inverted from try_acquire_console_sem() This patch also paves the way to switching console_sem from a semaphore to a mutex. [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: make console_trylock return 1 on success, per Geert] Signed-off-by: NTorben Hohn <torbenh@gmx.de> Cc: Thomas Gleixner <tglx@tglx.de> Cc: Greg KH <gregkh@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Andrea Arcangeli 提交于
This fixes TRANSPARENT_HUGEPAGE=y with PARAVIRT=y and HIGHMEM64=n. The #ifdef that this patch removes was erratically introduced to fix a build error for noPAE (where pmd.pmd doesn't exist). So then the kernel built but it failed at runtime because set_pmd_at was a noop. This will correct it by enabling set_pmd_at for noPAE mode too. Signed-off-by: NAndrea Arcangeli <aarcange@redhat.com> Reported-by: Nwerner <w.landgraf@ru.ru> Reported-by: NMinchan Kim <minchan.kim@gmail.com> Tested-by: NMinchan Kim <minchan.kim@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Hartley Sweeten 提交于
The EP93xx C and D GPIO ports are multiplexed with the Keypad Interface peripheral. At power-up they default into non-GPIO mode with the Key Matrix controller enabled so these ports are unusable for GPIO. Note that the Keypad Interface peripheral is only available in the EP9307, EP9312, and EP9315 processor variants. The keypad support will clear the DeviceConfig bits appropriately to enable the Keypad Interface when the driver is loaded. And, when the driver is unloaded it will set the bits to return the ports to GPIO mode. To make these ports available for GPIO after power-up on all EP93xx processor variants, set the KEYS and GONK bits in the DeviceConfig register. Similarly, the E, G, and H ports are multiplexed with the IDE Interface peripheral. At power-up these also default into non-GPIO mode. Note that the IDE peripheral is only available in the EP9312 and EP9315 processor variants. Since an IDE driver is not even available in mainline, set the EONIDE, GONIDE, and HONIDE bits in the DeviceConfig register so that these ports will be available for GPIO use after power-up. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Catalin Marinas 提交于
Changing the virt_to_phys() argument to "const volatile void *" avoids compiler warnings in some situations where this function is used. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Ensure that the twd timer reload value is reprogrammed each time we enter periodic mode. This ensures that the reload value is always reset correctly. Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Pawel Moll 提交于
Timers on Versatile Express mainboard are used as system clock/event sources. Driver assumes that they are clocked with 1MHz signal. Old V2M firmware apparently configured it by default, but on newer boards one can observe that "sleep 1" command takes over 30 seconds to finish, as the timers are fed with 32kHz instead... This patch performs required magic and also removes code clearing timer's control registers, as exactly the same operations are performed by the timer driver few jiffies later. Signed-off-by: NPawel Moll <pawel.moll@arm.com> Tested-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 1月, 2011 4 次提交
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由 Russell King 提交于
Update the option text to those which appear on the front of the appropriate board user guides. This gives consistent board naming, and makes it obvious which option is for which platform. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
As no one seems to really know which configuration options tie up with which boards, I thought I'd do some investigation and try to work it out. After discussion with some folk in linaro, I think I have this nailed. The names are updated to use the name on the front of the appropriate board user guide for the various baseboards, which I've taken to be the official name for each board. I haven't significantly updated the descriptions for the tiles as that is even less clear - as far as I can see on ARMs website, there is no Cortex-A9 tile for Realview EB - only ARM11MPCore, ARM1156T2F-S, ARM1176TZF-S and Cortex-R4F. So exactly what this 'Multicore Cortex-A9 Tile' is... Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Fix two section mismatch warnings in the platform SMP bringup code for Realview and Versatile Express: WARNING: arch/arm/mach-realview/built-in.o(.text+0x8ac): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. WARNING: arch/arm/mach-vexpress/built-in.o(.text+0x7b4): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nobuhiro Iwamatsu 提交于
Renamed platform_register_device to platform_device_register. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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