There is no need for calculations for FIFO bypass mode.
Just in case set the nsample maximum limit, which
has been done in the calculation phase.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>

Alarm threshold interrupt is triggered right after the
playback start.
This interrupt is recieved during the first burst period,
and caused the state machine to write additional nSample
command, which has to be avoided.
To fix this issue move the DAC33 interrupt unmasking
after we configured the PREFILL register with a small
delay.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>

Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

It's a little verbose during path changes.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Use all the available Fratio values when configuring the WM8994 FLL, not
just 0 and 3, following more complete characterisation of the device
performance.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The WM8994 FLL can be clocked from one of four inputs, the two MCLKs and
the LRCLK and BCLK of the AIF associated with the FLL. Allow all four
inputs to be used rather than defaulting to MCLK1.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

An index equal to the array size may not be accessed.
Signed-off-by: NPhil Carmody <ext-phil.2.carmody@nokia.com>
Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Conversions to snd_soc_codec_{get|set}_drvdata() were missing in some files
in the previous commit.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

One of the features of the multi CODEC work is that it embeds a struct
device in the CODEC to provide diagnostics via a sysfs class rather than
via the device tree, at which point it's much better to use the struct
device private data rather than having two places to store it. Provide
an accessor function to allow this change to be made more easily, and
update all the CODEC drivers are updated.

To ensure use of the accessor the private data structure member is
renamed, meaning that if code developed with older an older core that
still uses private_data is merged it will fail to build.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

Signed-off-by: NBill Gatliff <bgat@billgatliff.com>
Acked-by: NRichard Purdie <rpurdie@rpsys.net>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Register the WM8750 as a SPI or I2C device. This patch mostly shuffles code
around. Hugely inspired by WM8753 which was already converted.

Also, this patch fixes the Jive and Spitz machine.
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Remove unused #include <linux/version.h>('s) in
  sound/soc/codecs/wm2000.c
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Support interrupt based microphone bias detection. The WM8994 has two
microphone bias supplies, with detection supported on both. Detection
using GPIOs together with the standard GPIO based jack framework is
already supported via the platform data for the WM8994 core driver.

Note that as well as the microphone bias itself the system clock and
whichever AIF clock is supplying the system clock will need to be
enabled for detection to function.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Otherwise we may try to power down multiple times when the using
idle bias off and the driver is removed.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

The DCS_DATAPATH_BUSY bit used to monitor the completion of DC servo
operations has been deprecated and with some more recente revisions
may perform incorrectly, especially when only analogue bypass paths
are in use. Switch to using readback from the DC servo command
register instead, which is supported for all devices. Without this
unacceptably long timeouts may be observed in some circumstances.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

If we need to offset correct the DC servo then don't use runtime
recalibration since that is likely to introduce further offsets
which will be evident on powerdown.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

More recent Wolfson hubs devices add the ability to read back the DC
servo calibration information from the register used to write offsets,
and later still ones remove the old readback registers. Add support
for the new scheme, and use it for WM8994 device revisions that
support it.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

If the correction wraps around then a substantial offset would be
introduced.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

The way i've factored out the bus probe and removal functions so
that there's no code in the individual I2C and SPI functions means
that the register() and unregister() functions could just be squashed
into the bus_probe() and bus_remove() functions.
Signed-off-by: NBarry Song <21cnbao@gmail.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

[The issue is an attempt to write the pdata without the AC97 device
allocated when using ac97.c - also added a comment in soc-core.c for the
special case for ac97. -- broonie]
Signed-off-by: NGraham Gower <graham.gower@gmail.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Implicit slab.h inclusion via percpu.h is about to go away.  Make sure
gfp.h or slab.h is included as necessary.
Signed-off-by: NTejun Heo <tj@kernel.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Sparse caught that initialize "playback" two times instead of
initializing "capture".
Signed-off-by: NDan Carpenter <error27@gmail.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Current ak4642 was not able to select pll.
This patch add support it.
It still expect PLL base input pin is MCKI.
see Table 5 "setting of PLL Mode" of datasheet
Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

This also adds the first DAI operation for AIF3 so fill out the ID and
the ops for that too.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

Don't force enable the microphone bias on WM8903 when doing jack
detection, and don't force enable microphone bias. This allows
platforms to only enable microphone detection when a jack has been
inserted.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

If no report is specified then disable detection. Note that we don't
disable the slow clock, though the power consumption from it should
be negligable. That should be reference counted, ideally through DAPM.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

Allow machines to control exactly when the bias is turned on and off.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

Gain controls on outputs affect the power consumption
when the gain is set to non 0 value.

Outputs with amps have one register to configure the
routing and the gain:
PREDL_CTL (0x25):
bit 0: Voice enable
bit 1: Audio L1 enable
bit 2: Audio L2 enable
bit 3: Audio R2 enable
bit 4-5: Gain (0x0 - power down, 0x1 - 6dB, 0x2 - 0dB, 0x3 - -6dB)

bit 0 - 3: is handled in DAPM domain (DAPM_MIXER)
bit 4 - 5: has simple volume control

If there is no audio activity (BIAS_STANDBY), and
user changes the volume, than the output amplifier will
be enabled.
If the user changes the routing (but the codec remains in
BIAS_STANDBY), than the cached gain value also be written
to the register, which enables the amplifier.

The existing workaround for this is to have virtual
PGAs associated with the outputs, and whit DAPM PMD
the gain on the output will be forced to 0 (off) by
bypassing the regcache.
This failed to disable the amplifiers in several
scenario (as mentioned above).

Also if the codec is in BIAS_ON state, and user modifies
a volume control, which path is actually not enabled, than
that amplifier will be enabled as well, but it will
be not turned off, since there is no DAPM path, which
would make mute it.

To prevent amps being enabled, when they are not
needed, introduce the following workaround:
Track the state of each of this type of output.
In twl4030_write only allow actual write, when the
given output is enabled, otherwise only update
the reg_cache.
The PGA event handlers on power up will write the cached
value to the chip (restoring gain, routing selection).
On power down 0 is written to the register (disabling
the amp, and also just in case clearing the routing).
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The export is not needed since the per-bus code lives in the same
module.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NYi Li <yi.li@analog.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Initial version of TWL6040 codec driver.

The TWL6040 codec uses a proprietary PDM-based digital audio interface.
Audio paths supported are:

- Input: Main Mic, Sub Mic, Headset Mic, Auxiliary-FM Left/Right
- Output: Headset Left/Right, Handsfree Left/Right

TWL6040 codec supports power-up/down manual and automatic sequence.
Manual sequence is done through a specific register writes sequence.
Automatic sequence is done when the codec is powered-up through the
external AUDPWRON line. The completion of the sequence is signaled
through the audio interrupt.

TWL6040 codec sysclk can be provided by: low-power or high
performance PLL:

- The low-power PLL takes a low-frequency input at 32,768 Hz and
generates an approximate of 17.64 or 19.2 MHz (for 44.1 KHz and 48 KHz
respectively)

- The high-performance PLL generates an exact 19.2 MHz clock signal
from high-frequency input at 12/19.2/26/38.4 MHz.

Low-power playback mode is a special scenario where only headset path
(headset DAC and driver) is active.

For the particular case of headset path, PLL being used defines the
headset power mode: low-power, high-performance.
Signed-off-by: NMisael Lopez Cruz <x0052729@ti.com>
Signed-off-by: NJorge Eduardo Candelaria <jorge.candelaria@ti.com>
Signed-off-by: NMargarita Olaya Cabrera <magi.olaya@ti.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

We're keeping track of the number of times we've iterated but never
actually using this to bail out if the chip looks stuck.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>

During validation of the internal clocking setup it has
been found that the following settings were not configured
in an optimal way:

ASRC_CTRL_A: SRCLKDIV was incorrect, instad of divide ratio 3,
             ratio of 2 has to be used (as the comment stated)
DAC_CTRL_A: Fs = Fsref is the desired configuration instead of
            Fs = Fsref / 1.5
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

To make DSP_A mode working correctly the data delay should be
configured to 0. DSP_B mode thus can not be used with DAC33,
so remove it.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The WM8750 is using some delayed work to manage the ramping of the bias
at startup and resume out of line from the normal flow.  This predates
the support within ASoC core for moving the resume out of line from the
main system resume which provides equivalent functionality with better
interaction with applications.  Change to doing the ramp in line to make
use of the core functionality.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>