This patch adds SD5v1.dts file for supporting SD5v1(Exynos5440) board.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Updated the bootargs to boot the system with rootfs in /dev/sda2
instead of ramdisk.
Signed-off-by: NSubash Patel <subash.rp@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

PMU in exynos5440 generates one interrupt per core and needs to be
passed from DT to GIC to register it.
Signed-off-by: NSubash Patel <subash.rp@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds node for GMAC for exynos5440 SoC supported by GMAC
driver.
Signed-off-by: NByungho An <bh74.an@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos5440 pin-controller generates eight interrupts to support
gpio interrupts. List those interrupt numbers in the pin-controller
node.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds FIMD related nodes for the Origen Quad board.
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds a common FIMD device node for all Exynos4 SoCs.
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds device tree node for the SYSREG registers block
found in Samsung S5P/Exynos SoC series. The SYSREG module
generates control signals for the ARM CPU and various IP blocks
and buses. SYSREG block registers are exposed through APB bus
interface. A sysreg device tree node is to be associated with
mfd syscon driver and all SYSREG clients should use regmap
interface it provides. It allows to eliminate any possible races
and conflicts should different drivers attempt to concurrently
access same register.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add display timing node to exynos5250-smdk5250.dts
Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This adds common FIMD device node for all Exynos5 SoCs
Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos5440 has GIC which has virtualization support
in them. These are used by KVM.
Signed-off-by: NGiridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This is a fixup to two device tree nodes that have already landed but
without clock nodes since the transition to common clock happened at
the same time.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>
[gautam.vivek@samsung.com: tested on smdk5250]
Tested-by: NVivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The exynos 5250 SoC supports A15 style architected timers. Indicate
this through the device tree.

This is required by KVM.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The GIC in the exynos5250 SoC is A15 compliant. Show this through
the device tree, so that we can use the GIC for KVM.

Also add the respective A15 memory regions and interrupt links.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added HDMI hot plug and regulator nodes to Arndale DT file.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added MFC codec node to Arndale DT file.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added vmmc regulator node to Arndale DT file.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added S5M8767 PMIC DT nodes for Arndale board. Only the used
LDO's/BUCK are defined here. Also the nodes describe the default/reset
state LDO's and no power mangement tuning is implemented. The usage
desription can be found in s5m8767 device tree binding documentation.
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added GPIO buttons DT node to Arndale board file.
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This is required to keep the existing functionality of having no
write protect pin on Arndale board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add default pin state information for all client nodes that require
pin configuration support using pinctrl interface.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Tested-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add default pin state information for all client nodes that require
pin configuration support using pinctrl interface.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added G2D DT node to Origen4412 board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added G2D DT node to SMDK4412 board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added G2D DT node to exynos4x12.dtsi file.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added G2D DT node to Origen4210 board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added G2D DT node to SMDKV310 board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added G2D DT node to Exynos4210.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The functions exynos4_clk_init and exynos4_clk_register_fixed_ext
are applicable only on Exynos4 non-dt platforms. But when building
Exynos5 platforms without including Exynos4 platforms, the following
errors show up.

arch/arm/mach-exynos/built-in.o: In function `exynos_init_time':
arch/arm/mach-exynos/common.c:446: undefined reference to `exynos4_clk_init'
arch/arm/mach-exynos/common.c:447: undefined reference to `exynos4_clk_register_fixed_ext'

Fix this compilation errors by marking these calls as Exynos4 specific.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The clock frequency of xxti and xusbxti clocks is dependent on the
frequency of the on-board oscillator that is used to generate these
clocks. So allow the frequency of these clocks to be specfied from
device tree.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For all supported peripheral controllers on Exynos5440, add clock
lookup information.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For all supported peripheral controllers on Exynos5250, add clock
lookup information.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For all supported peripheral controllers on Exynos4 SoCs, add clock
lookup information.
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Tested-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add clock controller nodes for EXYNOS4210, EXYNOS4x12, EXYNOS5250
and EXYNOS5440 SoCs.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

With support for device tree based clock lookup now available, remove
the auxdata table from exynos4/5 dt-enabled machine file.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The clock speed of xxti and xusbxti clocks depends on the oscillator
used on the board to generate these clocks. For non-dt platforms,
allow the board support for those platforms to set the clock frequency
of xxti and xusbxti clocks.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since the clock initialization should be completed prior to the mct
timer initialization, create a new function 'exynos_init_time' that
first sets up the clock and then invokes the timer initialization
function. The 'init_time' callback in the board files are updated to
invoke this new wrapper function.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Remove Samsung specific clock support in Exynos4/5 and migrate to
use common clock framework.
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Tested-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Fix typo on register address of slink3 controller where register
address is wrongly set as 0x7000d480 but it is 0x7000d800.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>