Some devices have several controllers; need add the index info to
device slot name host->slot_desc[]
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Both of these drivers work well (although some hardware still has
its problems) and are not in the "alpha" quality that EXPERIMENTAL
suggests.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

As pci config space is reinitialised on a suspend/resume cycle, the
disabler needs to work its magic at resume time. For symmetry this
change also explicitly enables the controller at suspend time but
it's not strictly necessary.
Signed-off-by: NPhilipl Langdale <philipl@overt.org>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Move the tps65010 header file from the OMAP arch directory to the
more generic <linux/i2c/...> directory, and remove the spurious
dependency of this driver on OMAP.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NJean Delvare <khali@linux-fr.org>

This patchis to add the first mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.

On zylonite, the first controller supports two slots, this patch
only support the first one right now.
Signed-off-by: NBridge Wu <bridge.wu@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch is to move pxamci DMA specific code to corresponding
platform layer because using DRCMRRXMMC/DRCMRTXMMC in pxamci.c makes
the driver code dedicated to platform which is not extensible.

It is applicable to all pxa platforms.
Signed-off-by: NBridge Wu <bridge.wu@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

pxa3[0|1]0 mmc controller can support 26MHz clock mode, they support
SD spec 1.1 and MMC spec 4.0 which specify high speed mode. So host
caps will include MMC_CAP_MMC_HIGHSPEED and MMC_CAP_SD_HIGHSPEED for
pxa3[0|1]0.

This patch is to add 26MHz support for them. pxa host clock will be
set to 26MHz mode when the card supported max clock rate is higher
than or equal to 26MHz.
Signed-off-by: NBridge Wu <bridge.wu@marvell.com>
Acked-by: NPierre Ossman <drzeus@drzeus.cx>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some controllers have been designed on the assumption that all transfers
will be 32-bit aligned, both in start address and in size. This is not a
guarantee the SDHCI specification provides and not one we can provide.

Revert back to PIO for individual requests in order to work around the
hardware bug.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

We support 2.0 controllers, even though we don't use anything in the new
feature set.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Add a comment for each quirk to describe what it does and why.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Given the patch which simplifies the spi_sync calling convention, this one
updates the callers of that routine which tried using it according to the
previous specification.  (Most didn't.)
Signed-off-by: NMarc Pignat <marc.pignat@hevs.ch>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

It is possible to handle arbitrary block sizes with tifm card reader by
conditionally switching to PIO in case such block has to be delivered. At
the beginning of each request, DMA is either disabled (non-power-of-2 block
size) or set to load time user preference.
Signed-off-by: NAlex Dubov <oakad@yahoo.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Signed-off-by: NRolf Eike Beer <eike-kernel@sf-tec.de>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Fix:

WARNING: at arch/arm/mach-pxa/clock.c:69 clk_disable()
[<c002d7c8>] (dump_stack+0x0/0x14) from [<c00334f4>] (clk_disable+0x34/0xa0)
[<c00334c0>] (clk_disable+0x0/0xa0) from [<c028a43c>] (pxamci_set_ios+0x74/0xf0)
[<c028a3c8>] (pxamci_set_ios+0x0/0xf0) from [<c0281548>] (mmc_power_off+0x90/0x9c)
[<c02814b8>] (mmc_power_off+0x0/0x9c) from [<c0281a30>] (mmc_start_host+0x18/0x28)
[<c0281a18>] (mmc_start_host+0x0/0x28) from [<c02825a0>] (mmc_add_host+0xe8/0x104)
[<c02824b8>] (mmc_add_host+0x0/0x104) from [<c028a7d0>] (pxamci_probe+0x24c/0x2f4)
[<c028a584>] (pxamci_probe+0x0/0x2f4) from [<c01e5948>] (platform_drv_probe+0x20/0x24)
...
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The previous change omits "data->" prefix
in the "data->sg" case. This change fixes kernel
compilation.
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>

 drivers/mmc/host/imxmmc.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
Signed-off-by: NJens Axboe <axboe@carl.home.kernel.dk>

 #include <scatterlist/scatterlist.h>
is an odd thing to do...
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Patch 49dce689 changed the sysfs data
structures for SPI in a way which broke the MMC-over-SPI host driver.

This patch fixes that regression by changing the scheme used to keep
from knowingly trying to use a shared bus segment, and updates the
adjacent comments slightly to better explain the issue.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The flags parameter got removed in a previous commit, but some
references were overlooked.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Do a full scan of the directory to try and be a bit more proactive,
instead of waiting for things to break.
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Commits

  58b053e4 ("Update arch/ to use sg helpers")
  45711f1a ("[SG] Update drivers to use sg helpers")
  fa05f128 ("Update net/ to use sg helpers")

converted many files to use the scatter gather helpers without ensuring
that the necessary headerfile <linux/scatterlist> is included.  This
happened to work for ia64, powerpc, sparc64 and x86 because they
happened to drag in that file via their <asm/dma-mapping.h>.

On most of the others this probably broke.

Instead of increasing the header file spider web I choose to include
<linux/scatterlist.h> directly into the affectes files.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

Signed-off-by: NJens Axboe <jens.axboe@oracle.com>

A small MMC driver cleanup.

Use the defined AT91_MCI_ERRORS in at91_mci_completed_command() instead
of specifying all the error bits individually.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

AFAICS, fallout from repacing include of blkdev.h with include of bio.h.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Make the SPI framework and drivers stop using class_device.  Update docs
accordingly ...  highlighting just which sysfs paths should be
"safe"/stable.
Signed-off-by: NTony Jones <tonyj@suse.de>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Make sure the mmc_spi driver can build without CONFIG_BLOCK.
Issue noted by "Avuton Olrich" <avuton@gmail.com> and randconfig.

While that won't be a common configuration, sometimes embedded
boards use SDIO to interface WLAN or Bluetooth chips (vs some
parallel interface), and don't provide an MMC/SD socket for use
with flash memory cards.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Using weight32() to determine if a value is a power of 2 is a rather
heavi weight solution.  The classic idiom is (x & (x - 1)) == 0, but
the kernel already provide a is_power_of_2 function for it.
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The PXA has two transmit FIFOes, each32 byte deep.  when one FIFO is
full and the other one has been transmitted, they are automatically
swapped and DMA is triggered for another 32 byte burst.  However, when
there is less than 32 bytes left to send, the FIFO swap has to be done
manually. This is required for some SDIO transfers which are not
required to be multiples of 32 bytes.

A DMA completion interrupt is set for each descriptor which length isn't
a multiple of 32 in order to force the FIFO swap.  While at it, the DMA
interrupt handler has been made a bit more resilient against errors.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The forcedma and nodma module parameters can be replaced with the quirks
parameter, so remove the redundancy.
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Some controllers like ENE712 can't work properly with DMA mode,
add this quirk to force these kinds of HW work with PIO mode
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Many host controllers don't fully follow the PCI spec to claim
whether they support DMA in PCI class register. Leave the driver
to judge it from the Capability register, quirks and module parameter
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Thanks to Matt Domsch and Rezwanul Kabir at Dell, we know how to disable the
MMC controller on the multi-function Ricoh R5C832. The MMC controller needs
to be disabled or it will steal MMC cards from the SD controller where they
would otherwise be supported by the Linux SDHCI driver.
Signed-off-by: NPhilipl Langdale <philipl@overt.org>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Again, only available from PXA27x.
Signed-off-by: NBridge Wu <mingqiao.wu@gmail.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

From PXA27x, it is possible to do 4-bit data transfers.
Signed-off-by: NBridge Wu <mingqiao.wu@gmail.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

From PXA27x, it is possible to do 2048-byte block transfers.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Pending interrupts should be determined from both I_REG and I_MASK
registers.
Signed-off-by: NBridge Wu <mingqiao.wu@gmail.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

The patch enables to define MMC host get_ro() method through platform data.
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>