DISPC needs to know the clock rate for DIGIT (i.e. TV) channel, and this
clock is provided by either VENC or HDMI modules. Currently DISPC will
call a function in VENC/HDMI, asking what the clock rate is. This means
we have a fixed dependency from DISPC to both VENC and HDMI.

To have a more generic approach, and in particular to allow adding OMAP5
HDMI driver, we need to remove this dependency. This patch makes
VENC/HDMI inform DISPC when the their clock changes, thus reversing the
dependency and removing the issue.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Currently omapdrm creates crtcs, which map directly to DSS overlay
managers, only on demand at init time. This would make it difficult to
manage connecting the display entities in the future, as the code cannot
just search for a suitable overlay manager.

We cannot fix this the sane way, which would be to create crtcs for each
overlay manager, because we need an overlay for each crtc. With limited
number of overlays, that's not possible.

So the solution for now is to detach the overlay manager from the crtc.
crtcs are still created on demand at init time, but all overlay managers
are always initialized by the omapdss.

This way we can create and connect whole display pipelines from the
overlay manager to the display, regardless of which crtcs omapdrm would
create.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

DISPC on OMAP5 has a more optimised mechanism of asserting Mstandby to achieve
more power savings when DISPC is configured in Smart Standby mode. This
mechanism leads to underflows when multiple DISPC pipes are enabled.

There is a register field which can let us revert to the older mechanism of
asserting Mstandby. Configure this field to prevent underflows.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

When using a DISPC video pipeline to a fetch a NV12 buffer in a 2D container, we
need to set set a doublestride bit in the video pipe's ATTRIBUTES register. This
is needed because the stride for the UV plane(using a 16 bit Tiler container) is
double the stride for the Y plane(using a 8 bit Tiler container) for the 0 or
180 degree views. The ROW_INC register is meant for the Y plane, and the HW will
calculate the row increment needed for the UV plane by using double the stride
value based on whether this bit is set or not.

Set the bit when we are using a 2D Tiler buffer and when rotation is 0 or 180
degrees. The stride value is the same for 90 and 270 degree Tiler views, hence
the bit shouldn't be set.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Each version of OMAP has a limitation on the maximum pixel clock frequency
supported by an overlay manager. This limit isn't checked by omapdss. Add
dispc feats for lcd and tv managers and check whether the target timings can
be supported or not.

The pixel clock limitations are actually more complex. They depend on which OPP
OMAP is in, and they also depend on which encoder is the manager connected to.
The OPP dependence is ignored as DSS forces the PM framework to be on OPP100
when DSS is enabled, and the encoder dependencies are ignored by DISPC for now.
These limits should come from the encoder driver.

The OMAP2 TRM doesn't mention the maximum pixel clock limit. This value is left
as half of DSS_FCLK, as OMAP2 requires the PCD to be atleast 2.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Now that the old clock calculation code is no longer used, we can remove
it from the driver.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add new way to iterate over DISPC clock divisors. dispc_div_calc()
provides a generic way to go over all the divisors, within given pixel
clock range. dispc_div_calc() will call a callback function for each
divider set, making the function reusable for all use cases.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Store dispc core clock rate so that it's available for calculations even
if the HW is disabled.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The previous patch changes dispc to get the dispc fck rate from dss core
driver. This was the only use of the dispc fck in dispc, and thus we can
now remove the clock handling.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Dispc currently gets dispc's fck with clk_get() and uses clk_get_rate()
to get the rate for scaling calculations. This causes a problem with
common clock framework, as omapdss uses the dispc functions inside a
spinlock, and common clock framework uses a mutex in clk_get_rate().

Looking at the DSS clock tree, the above use of the dispc fck is not
quite correct. The DSS_FCLK from PRCM goes to DSS core block, which has
a mux to select the clock for DISPC from various options, so the current
use of dispc fck bypasses that. Fortunately we never change the dispc
clock mux for now.

To fix the issue with clk_get_rate(), this patch caches the dss clock
rate in dss.c when it is set. Dispc will then ask for the clock rate
from dss. While this is not very elegant, it does fix the issue, and
it's not totally wrong when considering that the dispc fck actually
comes via dss.

In the future we should probably look into common clock framework and
see if that could be used to represent the DSS clock tree properly.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Export DISPC functions.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

This patch adds a new function, dispc_ovl_check(), which can be used to
verify scaling configuration for an overlay. The function gets both the
overlay and overlay manager as parameters, so that the caller does not
need to configure the hardware before using this function.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The whole dispc irq handling system we currently have is only needed for
compat layer, and thus can be moved from dispc.c to the compat layer.

This is quite straigtforward, but we need to add new dispc functions to
request and free the actual hardware irq: dispc_request_irq() and
dispc_free_irq().
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

We have two functions to wait for a dispc interrupt:

int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,

Of these, the former is not used at all, and can be removed. The latter
is only used by the compat layer, and can be moved to the compat layer
code.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

dispc_mgr_enable_sync and dispc_mgr_disable_sync are only used with the
compat mode. Non-compat will use the simpler enable and disable
functions.

This patch moves the synchronous enable/disable code to the compat
layer. A new file is created, dispc-compat.c, which contains low level
dispc compat code (versus apply.c, which contains slightly higher level
compat code).
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

When enabling a hwmod, omap_hwmod refers to the register mentioned in the
hwmod struct's member 'prcm.omap4.context_offs' to see whether context was
lost or not. It increments the context lost count for the hwmod and then clears
the register.

All the DSS hwmods have the same register(RM_DSS_DSS_CONTEXT) as context_offs.
When DSS is enabled, the first hwmod to be enabled is the "dss_core" hwmod since
it's corresponding platform device is the parent platform device("omapdss_dss").
The dss_core hwmod updates it's context lost count correctly and clears the
register. When the hwmods corresponding to the children platform devices are
enabled, they see that the register is clear, and don't increment their context
lost count. Therefore, all the children platform devices never report a loss in
context.

The DISPC driver currently gets the context lost count for DSS power domain from
it's corresponding platform device instance("omapdss_dispc"). The DISPC platform
device is one of the child devices, and it's corresponding hwmod("dss_dispc")
doesn't report the context lost count correctly.

Modify dss_get_ctx_loss_count() such that it always takes the "omapdss_dss"
platform device as it's input, move the function to dss.c so that it has access
to that platform device.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

In order to make the scaling calculations independent of the current
hardware configuration (e.g. which manager is connected to this output),
we need to change the calc funcs to get all the variables needed for the
calculations via parameters.

This patch changes dispc_ovl_calc_scaling to get pclk and lclk as
parameters.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

In order to make the scaling calculations independent of the current
hardware configuration (e.g. which manager is connected to this output),
we need to change the calc funcs to get all the variables needed for the
calculations via parameters.

This patch changes calc_scaling to get pclk and lclk as parameters.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

In order to make the scaling calculations independent of the current
hardware configuration (e.g. which manager is connected to this output),
we need to change the calc funcs to get all the variables needed for the
calculations via parameters.

This patch changes check_horiz_timing_omap3() to get pclk and lclk as
parameters.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

In order to make the scaling calculations independent of the current
hardware configuration (e.g. which manager is connected to this output),
we need to change the calc funcs to get all the variables needed for the
calculations via parameters.

This patch changes calc_core_clk() function to get pclk as a parameter.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Change the dispc_plane_pclk_rate and dispc_plane_lclk_rate functions to
return 0 if the given plane is the writeback plane. The clocks are not
valid for WB, but returning 0 from these functions instead of running
into BUG() will simplify the code that uses these functions.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

dispc_mgr_go() should never be called with manager output disabled or if
the GO bit is already set. Change the current silent returns to
WARN_ONs.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Instead of doing direct register reads/writes, dispc_wb_enable() and
dispc_wb_is_enabled() functions can use the common overlay functions to
set and check the enable bit.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

WB will not be used with compat-mode, i.e. from omapfb. This means we
don't need the current complex dispc_wb_enable function, but can have a
simple register write version of the function.

This patch removes all the extra code from dispc_wb_enable()
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

dispc_mgr_disable_digit_out() needs to wait until the DIGIT output is
turned off. This is done with either VSYNC irq on OMAP2/3 and
FRAMEDONETV on OMAP4+. It currently uses a rather hacky way to decide
what irq to use.

This patch changes dispc_mgr_disable_digit_out to use
dispc_mgr_get_framedone_irq to find out if there's framedone irq on this
SoC, and if not, uses VSYNC.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

OMAP2/3 do not have FRAMEDONETV irq, but later omaps do. We currently
always return 0 from dispc_mgr_get_framedone_irq() for TV output to be
compatible with OMAP2/3.

This patch implements "no_framedone_tv" dispc-feature that is used in
dispc_mgr_get_framedone_irq to return either 0 for OMAP2/3, or the
correct IRQ number for FRAMEDONETV on OMAP4+.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add a dispc_features struct for OMAP5. Previously, OMAP5 used the same
struct as OMAP4. The new struct for OMAP5 contains the updated register
field offset and maximum limit for overlay manager width and height.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The overlay manager width and height vary in OMAP5 from previous OMAPs
in terms of maximum limit and register field positions. Add parameters
in dispc_features for these. Also remove params related to manager width
and height from dss_features, as we want to maintain a feature list for
individual IPs.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

When calculating row and pixel increments for graphics and video pipes, we need
to consider the dimensions of the input frame to know how to read from the
buffer. Hence, we need to calculate these parameters from the input to the
pipeline.

For writeback, the row and pixel increments need to be calculated based on the
output of the writeback pipeline, i.e, the dimensions of the frame after
scaling. Ensure that dispc driver uses values of out_width and out_height when
calling calc_dma/calc_tiler_rotation_offset.

For graphics and video pipes, the original code passed the original height as
frame_height to calc_dma_rotation_offset, and not the predecimated height. This
is left as it is for now. We need to figure out why pre decimated height isn't
needed.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Since writeback writes to a buffer instead of reading from one, predecimation
doesn't make sense for it. Configure the width and height predecimation limits
to 1 if the plane is writeback.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

dispc_ovl_calc_scaling_44xx() doesn't work correctly for writeback. There are
two issues with it:

- the function tries to calculate pixel clock for the input plane using
  dispc_plane_pclk_rate(), calling this with writeback as input plane results in
  a BUG(), this function shouldn't be called for writeback at all. Fix this by
  calculating pixel clock only when we are not in mem to mem mode.

- the maximum input_width is the product of the downscale ratio supported and
  the and the given output_width. This was calculated incorrectly by dividing
  output_width with maxdownscale. Fix this.
Signed-off-by: NArchit Taneja <archit@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Fix sparse warning:

drivers/video/omap2/dss/dispc.c:3320:6: warning: symbol
'dispc_dump_irqs' was not declared. Should it be static?
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Reported-by: NFengguang Wu <fengguang.wu@intel.com>

The return value of wait_for_completion_timeout() is always
>= 0 with unsigned int type.

So the condition "ret < 0" or "ret >= 0" is pointless.
Signed-off-by: Nliu chuansheng <chuansheng.liu@intel.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

check_horiz_timing_omap3() has a variable named 'DS'. i386 uses DS name
for something else, causing a compilation error. As 'DS' is not a very
good local variable name in the first place, let's change it to 'ds',
fixing the issue.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The dispc error handler tries to "fix" issues by disabling and enabling
panel. This is problematic, as we're trying to remove the dependency
from omapdss to the omap_dss_devices. It's also racy, and doesn't really
fix anything.

This patch removes the use of omap_dss_device from the error handler,
and just disables and enables the associated overlay manager. This
should produce similar results as the previous solution, without using
dssdev.

However, the error handling is still horrible. But the problem boils
down to one question, to which I don't have a clear answer: what to do
when a HW error happens?
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The dispc's error handler has a loop inside another loop, and both use
the same loop variable. This is clearly wrong, and this patch makes a
new variable for the inner loop.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

DISPC irqs need to be handled from the compat layer and also in the
future by the omapdrm. To make this possible, this patchs adds a set of
helper functions, so that the irqs can be managed without direct
register reads/writes.

The following functions are added, and all the current direct reg
reads/writes are changed to use these.

u32 dispc_read_irqstatus(void);
void dispc_clear_irqstatus(u32 mask);
u32 dispc_read_irqenable(void);
void dispc_write_irqenable(u32 mask);
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Add new dispc function, dispc_ovl_enabled(). This returns if the overlay
enable bit is set in the registers.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

We need a low level manager-enable function for omapdrm. We have that
function as dispc internal func, _enable_mgr_out().

This patch exposes that function, and renames it to dispc_mgr_enable().
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

The current dispc_mgr_enable/disable function are blocking, and do a bit
too much for omapdrm. We'll expose new enable & disable functions that
will just set the bits in the registers in the following patches.

This patch renames the current functions to *_sync, to make it clear
that they are blocking, and also to free up the dispc_mgr_enable/disable
names for these new functions.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>