Since all the used PWM prescalers and dividers configuration has been
moved to appropriate drivers, the pwm-clock infrastructure is now
unused and so this patch removes it.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NMark Brown <broonie@linaro.org>
Tested-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>

The different soc functions are now only used in the mach-s3c24xx
directory, so it's not necessary anymore to keep the globally
visible.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Platform data is used to specify controller hardware specific information
such as the tx/rx fifo level mask and bit offset of rx fifo level. Such
information is not suitable to be supplied from device tree. Instead,
it can be moved into the driver data and removed from platform data.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Currently usable are busclk0 and busclk2.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch moves S3C2416 stuff into mach-s3c24xx/ directory
so that we can merge the s3c24 series' directories to the
just one mach-s3c24xx/ directory.

Cc: Ben Dooks <ben-linux@fluff.org>
Tested-by: NHeiko Stuebner <heiko@sntech.de>
[kgene.kim@samsung.com: removed compiling s3c2416 as per Heiko's suggestion]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

plat-samsung/clock.h currently keeps all the SoC specific clock
declarations except the ones for S3C2443/S3C2416 which were kept in
s3c2443.h.

This patch moves them out of s3c2443.h to get rid of the header
completely later on.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support for lookup of sdhci-s3c controller clocks using generic names
for s3c2416, s3c64xx, s5pc100, s5pv210 and exynos4 SoC's.
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>
[kgene.kim@samsung.com: fixed trailing whitespace]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Previously the fclk rate was calculated by dividing the pll through
the divider value of the armdiv. With a real armdiv clk in place it's
possible to simply read its value, which does essentially the same.

This change makes the whole fdiv_fn function pointers supplied to
s3c2443_common_init_clocks and s3c2443_common_setup_clocks
obsolete, so remove it too.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This is needed for making the armdiv clock common to S3C2443
and S3C2416/2450.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The S3C2416/2450 has only 3 bits for the armdiv setting instead
of the 4 bits of the S3C2443.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Removed
- arch/arm/plat-s3c24xx/include/plat/pll.h
- arch/arm/mach-s3c64xx/include/mach/pll.h
- arch/arm/plat-s5p/include/plat/pll.h
- arch/arm/plat-samsung/include/plat/pll6553x.h

And created
- arch/arm/plat-samsung/include/plat/pll.h

Cc: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: changed title]
[kgene.kim@samsung.com: fixed conflicts in plat-s5p/include/pll.h]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This clock is special to the S3C2416/2450 SoCs.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define maps for HSMMC devices.

S3C2443 has one HSMMC device with base address 0x4A800000.
S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000.

So suppose that S3C2443 has only HSMMC1.

Define clock for hsmmc0 device and register it.
Signed-off-by: NYauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add basic clock support for the PLLs, HSMMC channels and
PWM clocks. This is enough to get a basic system up and
running.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>