This patch moves items of the s3c24xx support into
a new plat-s3c directory for items that use the
s3c24xx support but are not directly s3c24xx
compatible, such as the s3c2400 and s3c6400.

git mv commands:
git mv include/asm-arm/arch-s3c2410/iic.h include/asm-arm/plat-s3c/iic.h
git mv include/asm-arm/arch-s3c2410/nand.h include/asm-arm/plat-s3c/nand.h
git mv include/asm-arm/arch-s3c2410/regs-iic.h include/asm-arm/plat-s3c/regs-iic.h
git mv include/asm-arm/arch-s3c2410/regs-nand.h include/asm-arm/plat-s3c/regs-nand.h
git mv include/asm-arm/arch-s3c2410/regs-rtc.h include/asm-arm/plat-s3c/regs-rtc.h
git mv include/asm-arm/arch-s3c2410/regs-serial.h include/asm-arm/plat-s3c/regs-serial.h
git mv include/asm-arm/arch-s3c2410/regs-timer.h include/asm-arm/plat-s3c/regs-timer.h
git mv include/asm-arm/arch-s3c2410/regs-watchdog.h include/asm-arm/plat-s3c/regs-watchdog.h
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Since Ingo's recent scheduler rewrite which was merged as commit
0437e109 sched_cacheflush is unused.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

New arch macro STACK_TOP_MAX it gives the larges valid stack address for the
architecture in question.

It differs from STACK_TOP in that it will not distinguish between
personalities but will always return the largest possible address.

This is used to create the initial stack on execve, which we will move down to
the proper location once the binfmt code has figured out where that is.
Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: NOllie Wild <aaw@google.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add function helper, fb_is_primary_device().  Given struct fb_info, it will
return a nonzero value if the device is the primary display.

Currently, only the i386 is supported where the function checks for the
IORESOURCE_ROM_SHADOW flag.
Signed-off-by: NAntonino Daplas <adaplas@gmail.com>
Cc: David Miller <davem@davemloft.net>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Move arch-specific bits of fb_mmap() to their respective subdirectories

[bob.picco@hp.com: efi_range_is_wc is referenced but not declared]
[bunk@stusta.de: fix include/asm-m68k/fb.h]
Signed-off-by: NAntonino Daplas <adaplas@gmail.com>
Acked-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The last user of ptep_establish in mm/ is long gone.  Remove the architecture
primitive as well.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Hugh Dickins <hugh@veritas.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Convert the macb driver to use the generic PHY layer in
drivers/net/phy.
Signed-off-by: NFrederic RODO <f.rodo@til-technologies.fr>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Kill pte_rdprotect(), pte_exprotect(), pte_mkread(), pte_mkexec(), pte_read(),
pte_exec(), and pte_user() except where arch-specific code is making use of
them.
Signed-off-by: NJan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Christoph Hellwig <hch@infradead.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Adds the platform device definitions and the architecture specific support
routines (i.e. register initialization and descriptor formats) for the
iop-adma driver.

Changelog:
* add support for > 1k zero sum buffer sizes
* added dma/aau platform devices to iq80321 and iq80332 setup
* fixed the calculation in iop_desc_is_aligned
* support xor buffer sizes larger than 16MB
* fix places where software descriptors are assumed to be contiguous, only
  hardware descriptors are contiguous for up to a PAGE_SIZE buffer size
* convert to async_tx
* add interrupt support
* add platform devices for 80219 boards
* do not call platform register macros in driver code
* remove switch() statements for compatible register offsets/layouts
* change over to bitmap based capabilities
* remove unnecessary ARM assembly statement
* checkpatch.pl fixes
* gpl v2 only correction
* phys move to dma_async_tx_descriptor

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>

Adds the platform device definitions and the architecture specific
support routines (i.e. register initialization and descriptor formats) for the
iop-adma driver.

Changelog:
* added 'descriptor pool size' to the platform data
* add base support for buffer sizes larger than 16MB (hw max)
* build error fix from Kirill A. Shutemov
* rebase for async_tx changes
* add interrupt support
* do not call platform register macros in driver code
* remove unnecessary ARM assembly statement
* checkpatch.pl fixes
* gpl v2 only correction

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>

The Intel(R) IOP series of i/o processors integrate an Xscale core with
raid acceleration engines.  The capabilities per platform are:

iop219:
 (2) copy engines
iop321:
 (2) copy engines
 (1) xor and block fill engine
iop33x:
 (2) copy and crc32c engines
 (1) xor, xor zero sum, pq, pq zero sum, and block fill engine
iop34x (iop13xx):
 (2) copy, crc32c, xor, xor zero sum, and block fill engines
 (1) copy, crc32c, xor, xor zero sum, pq, pq zero sum, and block fill engine

The driver supports the features of the async_tx api:
* asynchronous notification of operation completion
* implicit (interupt triggered) handling of inter-channel transaction
  dependencies

The driver adapts to the platform it is running by two methods.
1/ #include <asm/arch/adma.h> which defines the hardware specific
   iop_chan_* and iop_desc_* routines as a series of static inline
   functions
2/ The private platform data attached to the platform_device defines the
   capabilities of the channels

20070626: Callbacks are run in a tasklet.  Given the recent discussion on
LKML about killing tasklets in favor of workqueues I did a quick conversion
of the driver.  Raid5 resync performance dropped from 50MB/s to 30MB/s, so
the tasklet implementation remains until a generic softirq interface is
available.

Changelog:
* fixed a slot allocation bug in do_iop13xx_adma_xor that caused too few
slots to be requested eventually leading to data corruption
* enabled the slot allocation routine to attempt to free slots before
returning -ENOMEM
* switched the cleanup routine to solely use the software chain and the
status register to determine if a descriptor is complete.  This is
necessary to support other IOP engines that do not have status writeback
capability
* make the driver iop generic
* modified the allocation routines to understand allocating a group of
slots for a single operation
* added a null xor initialization operation for the xor only channel on
iop3xx
* support xor operations on buffers larger than the hardware maximum
* split the do_* routines into separate prep, src/dest set, submit stages
* added async_tx support (dependent operations initiation at cleanup time)
* simplified group handling
* added interrupt support (callbacks via tasklets)
* brought the pending depth inline with ioat (i.e. 4 descriptors)
* drop dma mapping methods, suggested by Chris Leech
* don't use inline in C files, Adrian Bunk
* remove static tasklet declarations
* make iop_adma_alloc_slots easier to read and remove chances for a
  corrupted descriptor chain
* fix locking bug in iop_adma_alloc_chan_resources, Benjamin Herrenschmidt
* convert capabilities over to dma_cap_mask_t
* fixup sparse warnings
* add descriptor flush before iop_chan_enable
* checkpatch.pl fixes
* gpl v2 only correction
* move set_src, set_dest, submit to async_tx methods
* move group_list and phys to async_tx

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>

This patch lets the pxa2xx_udc use the generic gpio layer,
on the relevant PXA and IXP systems.
Signed-off-by: NMilan Svoboda <msvoboda@ra.rockwell.com>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

When running Linux in non-secure mode (on ARM1176 for example),
depending on the CP15 secure configuration register, the CPSR.F bit
(6) might only be modified from the secure mode. However, the
valid_user_regs() function checks for this bit being cleared. With
commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user
registers are not considered valid.

The patch also ensures that the CPSR.A bit is cleared and the USR mode
is set if the CPU does not support the 26bit user mode.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The patch moves the HWCAP definitions and the extern elf_hwcap
declaration to the hwcap.h header file.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Since the number of dma channels varies between pxa25x and pxa27x, it
introduces some specific code in dma.c. This patch moves the specific
code to pxa25x.c and pxa27x.c and makes dma.c more generic.

1. add pxa_init_dma() for dma initialization, the number of channels
   are passed in by the argument

2. add a "prio" field to the "struct pxa_dma_channel" for the channel
   priority, and is initialized in pxa_init_dma()

3. use a general priority comparison with the channels "prio" field so
   to remove the processor specific pxa_for_each_dma_prio macro,  this
   is not lightning fast as the original one,  but it is acceptable as
   it happens when requesting dma, which is usually not so performance
   critical
Signed-off-by: Neric miao <eric.miao@marvell.com>
Acked-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

ICIP2 is not examined during IRQ entrance, this patch add the
checking if the processor is PXA27x or later, with CoreG bits
in CPUID (Core Generation) > 1
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
   and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants

2. make the code specific to the high IRQ numbers (32..64) to be
   PXA27x specific

3. add a function pxa_init_irq_high() to initialize the internal
   high IRQ chip, the invoke of this function could be moved to
   PXA27x specific initialization code
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ
   starts from zero. This makes IRQ numbering inconsistent between
   PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX
   definition has the same value on both PXA25x and PXA27x.

2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this
   avoids unintentional use of these macros on PXA25x
Signed-off-by: Neric miao <eric.miao@marvell.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

pxamci.h redefines the MMC registers differently so they can be used
with ioremap.  Remove the incompatible definitions from pxa-regs.h.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

pxa_pm_finish() does nothing but return zero.  The core code
does nothing with this return value, and will not try to call
the finish method in the pm_ops structure if it is NULL.

Therefore, we can remove this useless function.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The ARM show_regs() tombstone only partially decodes which ARM ISA was
executing at the time a fault occurred displaying either "(T)" for the
Thumb case or nothing at all for other cases.  This patch therefore
explicitly identifies which state the processor is in at the time of
a fault: ARM, Thumb, Jazelle or JazelleEE.
Signed-off-by: NGeorge G. Davis <gdavis@mvista.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Driver to control the GPIO pins on the KS8695 processor.
The driver natively supports the Generic GPIO interface.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch provides support for the Netgear WG302 v2 and WAG302 v2 AccessPoint series.

This patch relies on the patch "Gateway 7001 series support" minimally, as they only have UART2 connected.

Updated to stay below the 80 char limit in uncompress.h
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NDeepak Saxena <dsaxena@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch provides support for the Gateway 7001 AccessPoint series.

Updated to stay below the 80 char limit in uncompress.h
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NDeepak Saxena <dsaxena@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

IXDP425 NAND support (arch specific part).

The generic platform driver that is used by ixdp425 platfrom is already
in upstream kernel in 2.6.22-rc1.
Signed-off-by: NVladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: NRuslan Sushko <rsushko@ru.mvista.com>
Signed-off-by: NDeepak Saxena <dsaxena@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Support for generic input output for MX1 family.
The implementation prevents allocation of one pin
by two users, but does not store pointer to the user
description permanently, because this solution
would have bigger memory overhead.

The simple way to integrate code with per BSP
pins setup and allocation is required else all GPIO
registration checking is useless. The function
imx_gpio_setup_multiple_pins() can be used for this
purpose in future.
Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Modify the common at91 hardware support to deal with the non-MMU
at91x40 family. The base RAM (which is most likely not DRAM) is
set to the configured value. Virtual IO device mapping is set
to be 1 to 1 with the physical addresses.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Acked-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Base at91x40 architecture support defines. These parts are somewhat
simpler than the ARM9 Atmel based parts.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Acked-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The AT91x40 family doesn't have the debug unit like its bigger brothers.
But it does have the ID and extension registers (with the bit meanings
the same). Reorganize at91_dbgu.h to cater for this.

This also affects the load uncompressor, since it outputs to the
debug port.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Acked-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Support pin multiplexing configurations driver for TI DaVinci SoC
Signed-off-by: NVladimir Barinov <vbarinov@ru.mvista.com>
Acked-by: NKevin Hilman <khilman@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Support GPIO driver for TI DaVinci SoC
Signed-off-by: NVladimir Barinov <vbarino@ru.mvista.com>
Acked-by: NDavid Brownell <david-b@pacbell.net>
Acked-by: NKevin Hilman <khilman@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Support clock control driver for TI DaVinci SoC
Signed-off-by: NVladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: NKevin Hilman <khilman@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Based on replies to a respective query, remove the pci_dac_dma_...() APIs
(except for pci_dac_dma_supported() on Alpha, where this function is used
in non-DAC PCI DMA code).
Signed-off-by: NJan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Jesse Barnes <jesse.barnes@intel.com>
Cc: Christoph Hellwig <hch@infradead.org>
Acked-by: NDavid Miller <davem@davemloft.net>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

I'm not sure if this is going to fly, weak symbols work on the compilers I'm
using, but whether they work for all of the affected architectures I can't say.
I've cc'ed as many arch maintainers/lists as I could find.

But assuming they do, we can use a weak empty definition of
pcibios_add_platform_entries() to avoid having an empty definition on every
arch.
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Not all the world is an i386.  Many architectures need 64-bit arguments to be
aligned in suitable pairs of registers, and the original
sys_sync_file_range(int, loff_t, loff_t, int) was therefore wasting an
argument register for padding after the first integer.  Since we don't
normally have more than 6 arguments for system calls, that left no room for
the final argument on some architectures.

Fix this by introducing sys_sync_file_range2(int, int, loff_t, loff_t) which
all fits nicely.  In fact, ARM already had that, but called it
sys_arm_sync_file_range.  Move it to fs/sync.c and rename it, then implement
the needed compatibility routine.  And stop the missing syscall check from
bitching about the absence of sys_sync_file_range() if we've implemented
sys_sync_file_range2() instead.

Tested on PPC32 and with 32-bit and 64-bit userspace on PPC64.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add the kernel release and version information to the output of
show_regs/oops.  Add the CPU PSR register.  Avoid using printk
to output partial lines; always output a complete line.

Re-combine the "Control" and "Table + DAC" lines after nommu
separated them; we don't want to waste vertical screen space
needlessly.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update the ANUBIS register definitions inline with the
specs and ensure they are registered correctly.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Ensure the CPLD 8bit settings are preserved over a suspend/resume
cycle as the CPU sends a hard-reset at resume time.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fix the CPLD register definitions to correctly mirror the
documentation
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>