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  1. 04 11月, 2008 5 次提交
  3. 09 10月, 2008 1 次提交
  5. 11 9月, 2008 1 次提交
  7. 16 8月, 2008 3 次提交
  9. 29 5月, 2008 6 次提交
  11. 03 5月, 2008 3 次提交
    • M
      tg3: Add link state reporting to UMP firmware · 7c5026aa
      由 Matt Carlson 提交于 
      All variants of the 5714, 5715, and 5780 offer a feature called the
"Universal Management Port".  This feature is implemented in firmware
and is largely transparent to the driver, except...

It turns out that the UMP firmware needs to know the current status
of the link.  Because the firmware cannot touch the PHY registers while
the driver is in control of the device, it needs the driver to report
link status changes through an additional handshaking mechanism.
Without this handshake, it has been observed in the field that the UMP
firmware will not operate correctly.

This patch implements the new handshake with the UMP firmware.  Since
the handshake uses the same mechanism ASF heartbeats use, code was
added to detect and wait for completion of a pending previous event.
Signed-off-by: NMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7c5026aa
    • M
      tg3: Fix 5761 NVRAM sizes · fd1122a2
      由 Matt Carlson 提交于 
      The 5761 NVRAM sizes assigned to the nvram_size member are half as big
as they should be.  This patch corrects the NVRAM sizes and replaces
the hardcoded constants with preprocessor constants for readability.
Signed-off-by: NMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fd1122a2
    • M
      tg3: Use constant 500KHz MI clock on adapters with a CPMU · 8ef21428
      由 Matt Carlson 提交于 
      The MI clock is not configured correctly on adapters with the CPMU
present.  The tg3 driver has code which statically sets the MI clock to
be a fraction of the speed at which the core clock is running.
However, the CPMU can change the adapter's core clock frequency based
on operating conditions.  Consequently, the MI will run slow when the
core's clock has been slowed down.

There is a new 500KHz constant frequency clock available on adapters
with a CPMU.  This patch removes the static core clock scaling and
configures the MI clock to use this new 500KHz clock instead.

Running the MI clock at slower speeds will not directly result in data
corruption, but it does challenge the PHY read and write routine timeouts.
Signed-off-by: NMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8ef21428
  13. 20 4月, 2008 1 次提交
    • M
      tg3: 5701 DMA corruption fix · 41588ba1
      由 Matt Carlson 提交于 
      Herbert Xu's commit fb93134d, entitled
"[TCP]: Fix size calculation in sk_stream_alloc_pskb", has triggered a
bug in the 5701 where the 5701 DMA engine will corrupt outgoing
packets.  This problem only happens when the starting address of the
packet matches a certain range of offsets and only when the 5701 is
placed downstream of a particular Intel bridge.

This patch detects the problematic bridge and if present, readjusts the
starting address of the packet data to a dword aligned boundary.
Signed-off-by: NMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      41588ba1
  15. 04 4月, 2008 1 次提交
  17. 29 1月, 2008 2 次提交
  19. 13 11月, 2007 6 次提交
  21. 22 10月, 2007 2 次提交
  23. 11 10月, 2007 8 次提交
  25. 19 7月, 2007 1 次提交
    • M
      [TG3]: Fix msi issue with kexec/kdump. · ee6a99b5
      由 Michael Chan 提交于 
      Tina Yang <tina.yang@oracle.com> discovered an MSI related problem
when doing kdump.  The problem is that the kexec kernel is booted
without going through system reset, and as a result, MSI may already
be enabled when tg3_init_one() is called.  tg3_init_one() calls
pci_save_state() which will save the stale MSI state.  Later on in
tg3_open(), we call pci_enable_msi() to reconfigure MSI on the chip
before we reset the chip.  After chip reset, we call
pci_restore_state() which will put the stale MSI address/data back
onto the chip.

This is no longer a problem in the latest kernel because
pci_restore_state() has been changed to restore MSI state from
internal data structures which will guarantee restoring the proper
MSI state.

But I think we should still fix it.  Our save and restore sequence
can still cause very subtle problems down the road.  The fix is to
have our own functions save and restore precisely what we need.  We
also change it to save and restore state inside tg3_chip_reset() in a
more straight forward way.

Thanks to Tina for helping to test and debug the problem.

[ Bump driver version and release date. -DaveM ]
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ee6a99b5