This change helps to choose msize, rx_watermark and tx_watermark
depending on block size for IDMAC mode.  For SDIO block size can be
variable, so if these values are set incorrectly, card clock may stop.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Both f_max and f_min will be informed for core layer to request
valid clock rate. But current setting from 'host->bus_hz' may
not represent the max/min frequency properly. Even if host can
actually support high speed than bus_hz, core layer will not
request clock rate over bus_hz. Basically, f_max/f_min can be set
with the values according to spec. And then host will make its best
effort to meet the rate.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

'supports-highspeed' is not one of the quirks but is a capability.
So, it's removed from quirks.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

As host controller can support eMMC's HS200 mode at 1.8V or 1.2V,
these capability will be added.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Exynos's host has divider logic before 'cclk_in' to controller core.
It means that actual clock rate of ciu clock comes from this divider
value. So, source clock should be adjusted along with 'ciu_div' which
indicates the host's divider ratio. Setting clock rate basically fits
the required speed. Specially, 'cclk_in' should have double rate of
target speed in case of DDR 8-bit mode.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Implements variable delay tuning. In this change, exynos host can
determine the correct sampling point for the HS200 and SDR104 speed mode.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

For the speed modes HS200 and SDR104, tuning is needed to determine the
correct sampling point. Actual tuning procedure is provided by specific
host controller driver.  This patch defines the tuning command and
tuning data.  Additionally, 'struct dw_mci_slot' is moved to header
file to consider the extensive usages in driver.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Exynos5420 Mobile Storage Host controller has Security Management
Unit (SMU) for channel 0 and channel 1 (mainly for eMMC).
This time, SMU configuration is set for non-encryption mode.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Current platform specific private data initialization call
dw_mci_exynos_priv_init() can be used to do platform specific
initialization of SMU and others in future. So the drv_data->init
call has moved to dw_mci_probe().
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Currently platform specific private data initialization is done by
dw_mci_socfpga_priv_init and dw_mci_socfpga_parse_dt. As we already have
separate platform specific device tree parser dw_mci_socfpga_parse_dt,
move the dw_mci_socfpga_priv_init code to dw_mci_socfpga_parse_dt.
We can use the dw_mci_socfpga_priv_init to do some actual platform
specific initialization.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Currently platform specific private data initialization is done by
dw_mci_exynos_priv_init and dw_mci_exynos_parse_dt. As we already have
separate platform specific device tree parser dw_mci_exynos_parse_dt,
move the dw_mci_exynos_priv_init code to dw_mci_exynos_parse_dt.
We can use the dw_mci_exynos_priv_init to do some actual platform
specific initialization of SMU and etc.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Tested-by: NAlim Akhtar <alim.akhtar@samsung.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The TMOUT register is set to 0xffffffff at probe time but isn't
set after suspend/resume.  Add an init of this value.

No problems were observed without this (it will also be set in
__dw_mci_start_request if there is data to send), but it makes the
register dump before and after suspend cleaner.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Previously the dw_mmc driver would ignore any requests to disable the
card's clock.  This doesn't seem like a good thing in general, but had
one extra bad side effect in the following situation:
* mmc core would set clk to 400kHz at boot time while scanning
* mmc core would set clk to 0 since no card, but it would be ignored.
* suspend to ram and resume; clocks in the dw_mmc IP block are now 0
  but dw_mmc thinks that they're 400kHz (it ignored the set to 0).
* insert card
* mmc core would set clk to 400kHz which would be considered a no-op.

Note that if there is no card in the slot and we do a suspend/resume
cycle, we _do_ still end up with differences in a dw_mmc register
dump, but the differences are clock related and we've got the clock
disabled both before and after, so this should be OK.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

If the WAKEUP_INT is asserted at wakeup and not cleared, we'll end up
looping around forever.  This has been seen to happen on exynos5420
silicon despite the fact that we haven't enabled any wakeup events due
to a silicon errata.  It is safe to do on all exynos variants.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The MMC subsystem handles looking for a card at probe time. Queuing up our
own can race with the rest of the MMC subsystem and cause problems if we
get unlucky with timing. Just remove driver own detection triggering.  While
progressing the request from 'mmc_rescan', if 'dw_mci_work_routine_card'
routine is activated, it will cancel the current request. The problem case
is that 'mmc_rescan' is prior to 'dw_mci_work_routine_card' from host own.
Specifically, the following message shows the detection problem in driver's
probing. It would get an err -123 (-ENOMEDIUM) during probe.

[    4.216595] dwmmc_exynos 12210000.dwmmc1: Using internal DMA controller.
[    4.395935] dwmmc_exynos 12210000.dwmmc1: Version ID is 250a
[    4.401948] dwmmc_exynos 12210000.dwmmc1: DW MMC controller at irq 108, 64 bit host data width, 64 deep fifo
[    4.424430] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[    4.453975] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[    4.459592] mmc_host mmc1: Bus speed (slot 0) = 100000000Hz (slot req 400000Hz, actual 400000HZ div = 125)
[    4.484258] dwmmc_exynos 12210000.dwmmc1: 1 slots initialized
[    4.485406] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[    4.487606] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[    4.489794] dwmmc_exynos 12210000.dwmmc1: sdr0 mode (irq=108, width=0)
[    4.509757] mmc1: error -123 whilst initialising SDIO card
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

cscope says there are no callers for mmc_try_claim_host in the kernel.
No reason to keep it.
Signed-off-by: NGrant Grundler <grundler@chromium.org>
Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

After the last architecture switched to generic hard irqs the config
options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code
for !CONFIG_GENERIC_HARDIRQS can be removed.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

This reverts commit 3af9d15c, which
causes a build failure:

drivers/mfd/asic3.c:724:2: error: unknown field 'set_pwr' specified in initializer

Update copyright date, and remove author address.
Signed-off-by: NWei WANG <wei_wang@realsil.com.cn>
Acked-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

If switching voltage fails, SD_CLK toggle enable bit should been cleared
so that SD host can control SD clock automatically.
Signed-off-by: NWei WANG <wei_wang@realsil.com.cn>
Acked-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

The default phase can meet most cards' requirement, but it is not the
optimal one. In some extreme situation, the rx phase point produced by
the following tuning process will drift quite a distance.
Before tuning UHS card, this patch will set a more proper initial tx
phase point, which is calculated from statistic data, and can achieve
a much better tx signal quality.
Signed-off-by: NWei WANG <wei_wang@realsil.com.cn>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Adapt Kconfig to include ARC in supported architectures
Signed-off-by: NMischa Jonker <mjonker@synopsys.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

In order to use the quirks2, initialized the host->quirks2.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <Kyungmin.park@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

When use the QUIRK_NONSTANDARD_CLOCK, then never set to 0 at clock control
register.  This patch fixes this problem.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

sdhci_bcm_kona_card_event is referenced only in this file.
Make it static.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NChristian Daudt <csd@broadcom.com>

version.h header inclusion is not necessary as detected by
versioncheck.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NChristian Daudt <csd@broadcom.com>

Add suppport to get voltage from device-tree node for esdhc host,
if voltage-ranges was specified in device-tree node we can get
ocr_mask instead of read from host capacity register. If not voltages
still can be get from host capacity register.
Signed-off-by: NHaijun Zhang <haijun.zhang@freescale.com>
Acked-by: NAnton Vorontsov <anton@enomsg.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

We use host->ocr_mask to hold the voltage get from device-tree
node, In case host->ocr_mask was available, we use host->ocr_mask
as the final available voltage can be used by MMC/SD/SDIO card.
Signed-off-by: NHaijun Zhang <haijun.zhang@freescale.com>
Reviewed-by: NAnton Vorontsov <anton@enomsg.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Add function to support getting voltage from device-tree.
If voltage-range is specified in device-tree node, this function
will parse it and return the available voltage mask.
Signed-off-by: NHaijun Zhang <haijun.zhang@freescale.com>
Acked-by: NAnton Vorontsov <anton@enomsg.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

OMAP's hs_mmc driver is used for MMC controller operation on many
omap2plus SoCs (OMAP2430, OMAP3, 4, 5 and AM335x).

Considering that the device tree entries are already present for these,
allow the driver to be built using the config ARCH_OMAP2PLUS rather
than individually adding a config for each SoC to enable the
support.

Use COMPILE_TEST to enable the build for other platforms.
Signed-off-by: NAmarinder Bindra <a-bindra@ti.com>
Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Cc: Nishanth Menon <nm@ti.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Commit 1f6b9fa4 consolidated writes to
the STAT register in one location, moving them from omap_hsmmc_do_irq()
to omap_hsmmc_irq(). This move has the unwanted side effect that the
controller status flags are potentially cleared after a new command has
been started as a consequence of reading the previous status flags.
This means that if the new command changes the status flags before the
IRQ routine returns, those flags may be cleared without handling the
event which asserted them, and thus missing the event.
Move the writing of the STAT register back in omap_hsmmc_do_irq(),
before handling the status flags which generated the interrupt.
Signed-off-by: NFrancesco Lavra <francescolavra.fl@gmail.com>
Reviewed-and-Tested-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The Exynos5420 has a DWMMC controller which is different from prior
versions.This patch adds a new compatible string for Exynos5420.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some newer MMCIF IP revisions contain a CE_CLK_CTRL2 register, that has to
be set for proper operation. Support for this feature is added in a way to
preserve the current behaviour by default, i.e. when it is not enabled
in platform data. Patch is based on work by Nobuyuki HIRAI.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some earlier MMCIF IP revisions contained Command Completion Signal
support, which has been dropped again in modern versions. Sopport for
this feature is added in a way to preserve the current behaviour by
default, i.e. when it is not enabled in platform data. Patch is based
on work by Nobuyuki HIRAI.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

To use DMA in the Device Tree case the driver has to be modified
to use suitable API to obtain DMA channels.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

sh_dma.h isn't needed in sh_mmcif.h, move it into sh_mmcif.c.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Add further OF compatibility strings to the SDHI driver to be able to
precisely control driver's behaviour on each of them.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Acked-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch enables bus-mastering mode for MMC controller to allow IDMAC
transfers.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Tested-by: NPrabu Thangamuthu <Prabu.T@synopsys.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

There is a typo when the mapped space is from BAR 2, but BAR 0 is
used instead.  This patch fixes the typo.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: NPrabu Thangamuthu <Prabu.T@synopsys.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The .set_pwr() callback isn't used anymore as all platforms register
GPIO-controlled regulators. Remove it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NChris Ball <cjb@laptop.org>