Skip to content

R
raspberrypi-kernel

openeuler / raspberrypi-kernel

通知 13
Star 1
Fork 0
R
raspberrypi-kernel
切换分支/标签
  1. 07 4月, 2009 2 次提交
  3. 05 4月, 2009 1 次提交
    • M
      bnx2: Use request_firmware() · 57579f76
      由 Michael Chan 提交于 
      Based on original patch by Ben Hutchings <ben@decadent.org.uk> and
Bastian Blank <waldi@debian.org>, with the following main changes:

Separated the mips firmware and rv2p firmware into different files
to make it easier to update them separately.

Added some code to fixup the rv2p code with run-time information
such as PAGE_SIZE.

Update version to 2.0.0.
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      57579f76
  5. 19 3月, 2009 1 次提交
    • M
      bnx2: Fix problem of using wrong IRQ handler. · 69010313
      由 Michael Chan 提交于 
      The MSI-X handler was chosen before the call to pci_enable_msix().
If MSI-X was not available, the wrong MSI-X handler would be used in
INTA mode.  This would cause a screaming interrupt problem because
INTA would not be cleared by the MSI-X handler.

Fixed by assigning MSI-X handler after pci_enable_msix() returns
successfully.  Also update version to 1.9.3.

Thomas Chenault <thomas_chenault@dell.com> helped us find this problem.
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      69010313
  7. 13 2月, 2009 2 次提交
  9. 28 1月, 2009 1 次提交
  11. 22 1月, 2009 2 次提交
  13. 23 12月, 2008 1 次提交
  15. 18 12月, 2008 1 次提交
  17. 17 12月, 2008 2 次提交
  19. 03 12月, 2008 1 次提交
    • M
      bnx2: Add workaround to handle missed MSI. · efba0180
      由 Michael Chan 提交于 
      The bnx2 chips do not support per MSI vector masking.  On 5706/5708, new MSI
address/data are stored only when the MSI enable bit is toggled.  As a result,
SMP affinity no longer works in the latest kernel.  A more serious problem is
that the driver will no longer receive interrupts when the MSI receiving CPU
goes offline.

The workaround in this patch only addresses the problem of CPU going offline.
When that happens, the driver's timer function will detect that it is making
no forward progress on pending interrupt events and will recover from it.

Eric Dumazet reported the problem.

We also found that if an interrupt is internally asserted while MSI and INTA
are disabled, the chip will end up in the same state after MSI is re-enabled.
The same workaround is needed for this problem. 
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Tested-by: NEric Dumazet <dada1@cosmosbay.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      efba0180
  21. 29 11月, 2008 1 次提交
  23. 22 11月, 2008 1 次提交
  25. 13 11月, 2008 6 次提交
  27. 04 11月, 2008 1 次提交
  29. 28 10月, 2008 1 次提交
  31. 10 10月, 2008 5 次提交
  33. 19 9月, 2008 4 次提交
  35. 16 8月, 2008 1 次提交
  37. 15 8月, 2008 4 次提交
  39. 19 7月, 2008 2 次提交