- 27 2月, 2010 23 次提交
-
-
由 Wu Zhangjin 提交于
Changes: o Move bus_clock into prom_init_env() o Initialize the cpu_clock_freq to the default values for the correspoding processor revisions if no such environment variable passed by BIOS/Bootloader. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: yanh@lemote.com Cc: huhb@lemote.com Cc: zhangfx@lemote.com Patchwork: http://patchwork.linux-mips.org/patch/826/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 David Daney 提交于
In order to achieve correct synchronization semantics, the Octeon port had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code that looks like: sync ll ... . . . sc ... . . sync The second SYNC was redundant, but harmless. Octeon has a SYNCW instruction that acts as a write-memory-barrier (due to an erratum in some parts two SYNCW are used). It is much faster than SYNC because it imposes ordering on the writes, but doesn't otherwise stall the execution pipeline. On Octeon, SYNC stalls execution until all preceeding writes are committed to the coherent memory system. Using: syncw;syncw ll . . . sc . . Has identical semantics to the first sequence, but is much faster. The SYNCW orders the writes, and the SC will not complete successfully until the write is committed to the coherent memory system. So at the end all preceeding writes have been committed. Since Octeon does not do speculative reads, this functions as a full barrier. The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes SYNCW for SYNC in write-memory-barriers. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/850/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 David Daney 提交于
Replace some instances of smp_llsc_mb() with a new macro smp_mb__before_llsc(). It is used before ll/sc sequences that are documented as needing write barrier semantics. The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(), so there are no changes in semantics. Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just barrier() in the non-SMP case. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/851/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 David Daney 提交于
The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree, remove them. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/848/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 David Daney 提交于
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: linux-i2c@vger.kernel.org To: ben-linux@fluff.org To: khali@linux-fr.org Cc: Rade Bozic <rade.bozic.ext@nsn.com> Patchwork: http://patchwork.linux-mips.org/patch/847/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Robert P. J. Day 提交于
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/810/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 David Daney 提交于
For 64-bit kernels with 64KB pages and two level page tables, there are 42 bits worth of virtual address space This is larger than the 40 bits of virtual address space obtained with the default 4KB Page size and three levels, so there are no draw backs for using two level tables with this configuration. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/761/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Use the GPIO config symbol to only build Au1000 interrupt code on chips with compatible hw. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/670/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Remove the cpu subtype cpp macros in favor of runtime detection, to improve compile coverage of the alchemy common code. (Increases kernel size by 700 bytes). Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/699/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Florian Fainelli 提交于
This patch makes the board code register the au1000-eth platform device. The au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg function like it has to be done for the Bosporus board which uses a different MAC/PHY setup. Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Cc: David Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/618/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Create own directory for DB1200 code and update it with new features. - SPI support: - tmp121 temperature sensor - SPI flash on DB1200 - I2C support - NE1619 sensor - AT24 eeprom - I2C/SPI can be selected at boot time via switch S6.8 - Carddetect IRQs for SD cards. - gen_nand based NAND support. - hexleds count sleep/wake transitions. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Nothing in-tree uses it, so get rid of it. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Remove unused uart bit definitions and base macros. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
This patch replaces the general alchemy prom_putchar() implementation in favor of board-specific versions: The UART where the output of prom_putchar is directed to really depends on the board, the current implementation hardcodes this on a per-SoC basis which is just wrong. So a generic uart tx function is provided in the alchemy headers, and the boards can provide their own prom_putchar with custom destination uart, and all in-kernel alchemy boards support early printk. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
DMA can only be done from physical addresses; move the "virt_to_phys" source/destination buffer address translation from the dbdma queueing functions (since the hardware can only DMA to/from physical addresses) to their respective users. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Remove dbdma compat macros, move remaining users over to default queueing functions and -flags. (Queueing function signature has changed in order to give a build failure instead of silent functional changes due to the no longer implicitly specified DDMA_FLAGS_IE flag) Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Eliminate the sharing of IRQ names among the differenct Alchemy variants. IRQ numbers need no longer be hidden behind a CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy code less reliant on a hardcoded subtype. This patch also renames the GPIO irq number constants. It's really an interrupt line, NOT a GPIO number! Code which relied on certain irq numbers to have the same name across all supported cpu subtypes is changed to determine current cpu subtype at runtime; in some places this isn't possible so a "compat" symbol is used. Run-tested on DB1200. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Extract the alchemy chip variant from c0_prid register. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/14/ Patchwork: http://patchwork.linux-mips.org/patch/707/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Register the PCMCIA driver on all boards supported by it, get rid of now-unused pcmcia macros in the board headers (and subsequently empty pb1100/pb1500 ones). Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
New PCMCIA socket driver for all Db/Pb1xxx boards (except Pb1000), which replaces au1000_db1x00.c and (most of) au1000_pb1x00.c. Notable improvements: - supports Db1000, DB/PB1100/1500/1550/1200. - support for carddetect and statuschange IRQs. - pcmcia socket mem/io/attr areas and irqs passed through platform resource information. - doesn't freeze system during card insertion/ejection like the one it replaces. - boardtype is automatically detected using BCSR ID register. Run-tested on the DB1200. Cc: Linux-PCMCIA <linux-pcmcia@lists.infradead.org> Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
remove board_init_irq(): On all in-kernel boards it is sufficient to initialize board interrupts in an arch_initcall by using the default linux irq functions. Some small irqmap.c files have been folded into board_setup files. Run-tested on DB1200; compile-tested on all other affected boards. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Move the PB1200 IRQ cascade code out to the BCSR support code: upcoming DB1300 support can use it too. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
All Alchemy development boards have external CPLDs with a few registers in them. They all share an identical register layout with only a few minor differences (except the PB1000) in bit functions and base addresses. This patch - adds a primitive facility to initialize and use these external registers, - replaces all occurrences of bcsr->xxx accesses with calls to the new functions (the pb1200 cascade irq handling code is special). - collects BCSR register information scattered throughout the board headers in a central place. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
- 03 2月, 2010 1 次提交
-
-
由 Guenter Roeck 提交于
Linux kernel 2.6.32 and later allocate address space from the top of the kernel virtual memory address space. This patch implements virtual memory size detection for 64 bit MIPS CPUs to avoid resulting crashes. Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/935/Reviewed-by: NDavid Daney <ddaney@caviumnetworks.com> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
- 02 2月, 2010 1 次提交
-
-
由 Manuel Lauss 提交于
DBDMA descriptors need to be located at 32-byte aligned addresses; however kmalloc in conjunction with the SLAB allocator and CONFIG_DEBUG_SLUB enabled doesn't deliver any. The dbdma code works around that by allocating a larger area and realigning the start address within it. When freeing a channel however this adjustment is not taken into account which results in an oops: Kernel bug detected[#1]: [...] Call Trace: [<80186010>] cache_free_debugcheck+0x284/0x318 [<801869d8>] kfree+0xe8/0x2a0 [<8010b31c>] au1xxx_dbdma_chan_free+0x2c/0x7c [<80388dc8>] au1x_pcm_dbdma_free+0x34/0x4c [<80388fa8>] au1xpsc_pcm_close+0x28/0x38 [<80383cb8>] soc_codec_close+0x14c/0x1cc [<8036dbb4>] snd_pcm_release_substream+0x60/0xac [<8036dc40>] snd_pcm_release+0x40/0xa0 [<8018c7a8>] __fput+0x11c/0x228 [<80188f60>] filp_close+0x7c/0x98 [<80189018>] sys_close+0x9c/0xe4 [<801022a0>] stack_done+0x20/0x3c Fix this by recording the address delivered by kmalloc() and using it as parameter to kfree(). This fix is only necessary with the SLAB allocator and CONFIG_DEBUG_SLAB enabled; non-debug SLAB, SLUB do return nicely aligned addresses, debug-enabled SLUB currently panics early in the boot process. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/878/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
- 28 1月, 2010 2 次提交
-
-
由 David VomLehn 提交于
The MIPS processor is limited to 64 external interrupt sources. Using a greater number without IRQ sharing requires reading platform-specific registers. On such platforms, reading the IntCtl register to determine which interrupt corresponds to a timer interrupt will not work. On MIPSR2 systems there is a solution - the TI bit in the Cause register, specifically indicates that a timer interrupt has occured. This patch uses that bit to detect interrupts for MIPSR2 processors, which may be expected to work regardless of how the timer interrupt may be routed in the hardware. Signed-off-by: David VomLehn (dvomlehn@cisco.com) To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/804/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 David VomLehn 提交于
Pre-compute addresses for the basic ASIC registers. This speeds up access and allows memory for unused configurations to be freed. In addition, uninitialized register addresses will be returned as NULL to catch bad usage quickly. Signed-off-by: NDavid VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/806/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
- 13 1月, 2010 1 次提交
-
-
由 Anton Blanchard 提交于
pcibus_to_node can return -1 if we cannot determine which node a pci bus is on. If passed -1, cpumask_of_node will negatively index the lookup array and pull in random data: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus 00000000,00000003,00000000,00000000 # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 64-65 Change cpumask_of_node to check for -1 and return cpu_all_mask in this case: # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus ffffffff,ffffffff,ffffffff,ffffffff # cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist 0-127 Signed-off-by: NAnton Blanchard <anton@samba.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Andrew Morton <akpm@linux-foundation.org> Patchwork: http://patchwork.linux-mips.org/patch/831/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
- 18 12月, 2009 1 次提交
-
-
由 Christoph Hellwig 提交于
Proper Posix O_SYNC handling only made it into 2.6.33, not 2.6.32. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
-
- 17 12月, 2009 11 次提交
-
-
由 Ralf Baechle 提交于
The platform has never been fully merged Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Cc: Thomas Koeller <thomas.koeller@baslerweb.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: linux-kernel@vger.kernel.org Cc: linux-mtd@lists.infradead.org Acked-by: NDavid Woodhouse <David.Woodhouse@intel.com> Acked-by: NWim Van Sebroeck <wim@iguana.be>
-
由 Wu Zhangjin 提交于
This patchs uses a loongson_uart_base variable instead of the uart_base[] array and adds a new kernel option to avoid to compile uart_base.c all the time, which will save a little bit of memory for us. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org http://patchwork.linux-mips.org/patch/727/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/709/
-
由 Ralf Baechle 提交于
Away with the daemons of ifdef; get ready for future COP2 users. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/708/
-
由 Wu Zhangjin 提交于
Yeeloong 2F netbook has an KB3310B embedded controller to manage the LID action. When the LID is closed or opened a SCI interrupt is sent out and the corresponding event is saved to an EC register for later query. Allow the LID open interrupt to wake the processor from wait mode if it is in the suspend mode. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/685/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Wu Zhangjin 提交于
When remove the -fno-omit-frame-pointer, gcc will not save the frame pointer for us, we need to save one ourselves. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/679/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Wu Zhangjin 提交于
This patch add a new section for MIPS to record the block of the hardirq handling for function graph tracer(print_graph_irq) via adding the __irq_entry annotation to the the entrypoints of the hardirqs(the block with irq_enter()...irq_exit()). Thanks goes to Steven & Frederic Weisbecker for their feedbacks. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Reviewed-by: NFrederic Weisbecker <fweisbec@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/676/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Wu Zhangjin 提交于
With dynamic function tracer, by default, _mcount is defined as an "empty" function, it returns directly without any more action . When enabling it in user-space, it will jump to a real tracing function(ftrace_caller), and do the real job for us. Differ from the static function tracer, dynamic function tracer provides two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the tracing of some indicated kernel functions(set_ftrace_filter). In the -v4 version, the implementation of this support is basically the same as X86 version does: _mcount is implemented as an empty function and ftrace_caller is implemented as a real tracing function respectively. But in this version, to support module tracing with the help of -mlong-calls in arch/mips/Makefile: MODFLAGS += -mlong-calls. The stuff becomes a little more complex. We need to cope with two different type of calling to _mcount. For the kernel part, the calling to _mcount(result of "objdump -hdr vmlinux"). is like this: 108: 03e0082d move at,ra 10c: 0c000000 jal 0 <fpcsr_pending> 10c: R_MIPS_26 _mcount 10c: R_MIPS_NONE *ABS* 10c: R_MIPS_NONE *ABS* 110: 00020021 nop For the module with -mlong-calls, it looks like this: c: 3c030000 lui v1,0x0 c: R_MIPS_HI16 _mcount c: R_MIPS_NONE *ABS* c: R_MIPS_NONE *ABS* 10: 64630000 daddiu v1,v1,0 10: R_MIPS_LO16 _mcount 10: R_MIPS_NONE *ABS* 10: R_MIPS_NONE *ABS* 14: 03e0082d move at,ra 18: 0060f809 jalr v1 In the kernel version, there is only one "_mcount" string for every kernel function, so, we just need to match this one in mcount_regex of scripts/recordmcount.pl, but in the module version, we need to choose one of the two to match. Herein, I choose the first one with "R_MIPS_HI16 _mcount". and In the kernel verion, without module tracing support, we just need to replace "jal _mcount" by "jal ftrace_caller" to do real tracing, and filter the tracing of some kernel functions via replacing it by a nop instruction. but as we have described before, the instruction "jal ftrace_caller" only left 32bit length for the address of ftrace_caller, it will fail when calling from the module space. so, herein, we must replace something else. the basic idea is loading the address of ftrace_caller to v1 via changing these two instructions: lui v1,0x0 addiu v1,v1,0 If we want to enable the tracing, we need to replace the above instructions to: lui v1, HI_16BIT_ftrace_caller addiu v1, v1, LOW_16BIT_ftrace_caller If we want to stop the tracing of the indicated kernel functions, we just need to replace the "jalr v1" to a nop instruction. but we need to replace two instructions and encode the above two instructions oursevles. Is there a simpler solution? Yes! Here it is, in this version, we put _mcount and ftrace_caller together, which means the address of _mcount and ftrace_caller is the same: _mcount: ftrace_caller: j ftrace_stub nop ...(do real tracing here)... ftrace_stub: jr ra move ra, at By default, the kernel functions call _mcount, and then jump to ftrace_stub and return. and when we want to do real tracing, we just need to remove that "j ftrace_stub", and it will run through the two "nop" instructions and then do the real tracing job. what about filtering job? we just need to do this: lui v1, hi_16bit_of_mcount <--> b 1f (0x10000004) addiu v1, v1, low_16bit_of_mcount move at, ra jalr v1 nop 1f: (rec->ip + 12) In linux-mips64, there will be some local symbols, whose name are prefixed by $L, which need to be filtered. thanks goes to Steven for writing the mips64-specific function_regex. In a conclusion, with RISC, things becomes easier with such a "stupid" trick, RISC is something like K.I.S.S, and also, there are lots of "simple" tricks in the whole ftrace support, thanks goes to Steven and the other folks for providing such a wonderful tracing framework! Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/675/Acked-by: NSteven Rostedt <rostedt@goodmis.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Wu Zhangjin 提交于
If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to _mcount will be inserted into each kernel function. so, there is a possibility to trace the kernel functions in _mcount. This patch add the MIPS specific _mcount support for static function tracing. by default, ftrace_trace_function is initialized as ftrace_stub(an empty function), so, the default _mcount will introduce very little overhead. after enabling ftrace in user-space, it will jump to a real tracing function and do static function tracing for us. and -ffunction-sections is incompatible with -pg, so, disable it when ftracer is enabled. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Reviewed-by: NSteven Rostedt <rostedt@goodmis.org> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: zhangfx@lemote.com Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/672/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Wu Zhangjin 提交于
Loongson 2F supports CPU clock scaling. When put it into wait mode by setting the frequency as ZERO it will stay in this mode until an external interrupt wakes the CPU again. To enable clock scaling support, an external timer of a known stable rate is required. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/660/ Patchwork: http://patchwork.linux-mips.org/patch/751/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Wu Zhangjin 提交于
CPUFreq support for Loongson 2F requires an external timer. Because the frequency of the MIPS Timer is related to the CPU frequency which itself is variable another timer of constant frequency is required. Export the mfgpt0 counter disable / enable operations for the coming suspend support to suspend / resume the timer. Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: cpufreq@vger.kernel.org, Cc: Dave Jones <davej@redhat.com>, Cc: Dominik Brodowski <linux@dominikbrodowski.net>, Cc: yanh@lemote.com Cc: huhb@lemote.com, Patchwork: http://patchwork.linux-mips.org/patch/658/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-