This patch makes the various mach dirs that use the plat-orion time
code pass in timer and bridge addresses explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

This patch declares the i2c audio codec and initialise audio.
It's adding the alc5621 codec in the i2c board info and is calling
kirkwood_audio_init() to initialize kirkwood audio.
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

New FPGA revisions have been released and seen in the wild on the
platform, so it's time to update the list.
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Initialize PCIE1 on the 6282-based QNAP TS-419P+ since it has a Marvell 9125
SATA chip on each PCI bus.
Signed-off-by: NZintis Pētersons <zintis.petersons@abcsolutions.lv>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Use the machine-specific kexec_reinit hook to make sure
PCIe is enabled before starting a new kernel.
Signed-off-by: NEric Cooper <ecc@cmu.edu>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

PCIe may have been disabled (by kirkwood_clock_gate)
if this kernel was started by kexec.  Make sure PCIe
is enabled before attempting to access the device ID
register, otherwise the system will hang.
Signed-off-by: NEric Cooper <ecc@cmu.edu>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Provide the option to call a machine-specific function
before kexec'ing a new kernel.
Signed-off-by: NEric Cooper <ecc@cmu.edu>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

The NAND supports 32bit reads and writes so lets stop shunting 8bit
chunks across the bus.

Doing a dumb 'dd' benchmark, this increases performance roughly like so:
 * read: 1.3MB/s to 3.4MB/s
 * write: 614kB/s to 882kB/s
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>
Signed-off-by: NNicolas Pitre <nico@fluxnic.net>

Marcin Slusarz says:

> In arch/arm/kernel/kprobes-decode.c there's a function
> arm_kprobe_decode_insn which does:
>
> } else if ((insn & 0x0e000000) == 0x0c400000) {
> ...
>
> This is always false, so code below is dead.
> I found this bug by coccinelle (http://coccinelle.lip6.fr/).
Reported-by: NMarcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

There's no need to noMMU to put tlb_flush() in asm/tlbflush.h - it's
part of the tlb shootdown interface.  Move it to asm/tlb.h instead, as
per x86.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We need to delay freeing any mapped page on SMP and ARMv7 systems to
ensure that the data is not accessed by other CPUs, or is used for
speculative prefetch with ARMv7.  This includes not only mapped pages
but also pages used for the page tables themselves.

This avoids races with the MMU/other CPUs accessing pages after they've
been freed but before we've invalidated the TLB.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When SMP_ON_UP is used and the spinlocks are inlined, we end up with
inline spinlocks in the exit code, with references from the SMP
alternatives section to the exit sections.  This causes link time
errors.  Avoid this by placing the exit sections in the init-discarded
region.

Cc: <stable@kernel.org>
Tested-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Ensure a predictable endian state when entering signal handlers.  This
avoids programs which use SETEND to momentarily switch their endian
state from having their signal handlers entered with an unpredictable
endian state.

Cc: <stable@kernel.org>
Acked-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Commit 18991197 added --build-id
linker option when toolchain supports it. ARM one does, but for some
reason places the section at 0 when linker script doesn't mention it
explicitly.

The 1e621a8e worked around the problem
removing this section from binary image with explicit objcopy options,
but it still exists in vmlinux, confusing tools like debuggers and perf.

This problem was discussed here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-May/015994.html
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-May/015994.html
but the proposed changes to the linker script were substantial.

This patch simply places NOTES (36 bytes long, at least when compiled
with CodeSourcery toolchain) between data and bss, which seem to be
the right place (and suggested by the sample linker script in
include/asm-generic/vmlinux.lds.h).

It is enough to place it correctly in vmlinux (so debuggers are happy):

Section Headers:
  [11] .data             PROGBITS        c07ce000 7ce000 020fc0 00  WA  0   0 32
  [12] .notes            NOTE            c07eefc0 7eefc0 000024 00  AX  0   0  4
  [13] .bss              NOBITS          c07ef000 7eefe4 01e628 00  WA  0   0 32
Program Headers:
  LOAD           0x008000 0xc0008000 0xc0008000 0x7e6fe4 0x805628 RWE 0x8000
  NOTE           0x7eefc0 0xc07eefc0 0xc07eefc0 0x00024 0x00024 R E 0x4
Section to Segment mapping:
  Segment Sections...
   00     <...> .data .notes .bss
   01     .notes

and to get it exposed as /sys/kernel/notes used by perf tools.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

SPEAR320_SOC_CONFIG_BASE was wrong, causing the wrong registers to be
accessed.
Reviewed-by: NStanley Miao <stanley.miao@windriver.com>
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

In sysctl_soft_reset(), switch to slow mode before resetting the system
via the system controller.  This is required.
Reviewed-by: NStanley Miao <stanley.miao@windriver.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

readl() and writel() calls the outer cache maintainance operations
which are not available during Linux uncompression. This patch replaces
readl() and writel() with readl_relaxed() and writel_relaxed() to avoid
the link time errors.
Reviewed-by: NStanley Miao <stanley.miao@windriver.com>
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch fixes following warning:
arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int'

by appending UL to VMALLOC_END's Number.
Reviewed-by: NStanley Miao <stanley.miao@windriver.com>
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

If ID_MMFR0[3:0] >= 3, the architecture version is ARMv7. The code was
currently only testing for ID_MMFR0[3:0] == 3.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

On versions of the Cortex-A9 prior to r3p0, an interrupted ICIALLUIS
operation may prevent the completion of a following broadcasted
operation if the second operation is received by a CPU before the
ICIALLUIS has completed, potentially leading to corrupted entries in
the cache or TLB.

This workaround sets a bit in the diagnostic register of the Cortex-A9,
causing CP15 maintenance operations to be uninterruptible.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Now that we can execute a CONFIG_SMP kernel on a uniprocessor system,
extra care has to be taken in the PMU IRQ affinity setting code to
ensure that we don't always fail to initialise.

This patch changes the CPU PMU initialisation code so that when we
only have a single IRQ, whose affinity can not be changed at the
controller, we report success (0) rather than -EINVAL.
Reported-by: NAvik Sil <avik.sil@linaro.org>
Acked-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The effect of cache sync operation is to drain the store buffer and
wait for all internal buffers to be empty. In normal conditions, store
buffer is able to merge the normal memory writes within its 32-byte
data buffers.  Due to this erratum present in r3p0, the effect of cache
sync operation on the store buffer still remains when the operation
completes. This means that the store buffer is always asked to drain
and this prevents it from merging any further writes.

This can severely affect performance on the write traffic esp. on
Normal memory NC one.

The proposed workaround is to replace the normal offset of cache sync
operation(0x730) by another offset targeting an unmapped PL310
register 0x740.
Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Since commit 1130e5b3 regulators are exported to debugfs. The names
of the regulators that contains slash ('/') causes an ops during kernel
boot. This patch fixes this issue.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Max8998 PMIC driver's platform data has been changed once again in
commit 735a3d9e. This patch fixes build break caused by that commit.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

s3c24xx_ts_set_platdata is annotated __init and not used by any module,
thus don't export it.

This patch fixes below warning:

WARNING: arch/arm/plat-samsung/built-in.o(__ksymtab+0x90): Section mismatch
in reference from the variable __ksymtab_s3c24xx_ts_set_platdata to the
function .init.text:s3c24xx_ts_set_platdata()

The symbol s3c24xx_ts_set_platdata is exported and annotated __init
Fix this by removing the __init annotation of s3c24xx_ts_set_platdata
or drop the export.
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For S5P platforms, the end address in memory resource information for UART
devices is one byte more than the intended value. Fix this by reducing the
end address by one byte.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The ptrace debug information register was advertising breakpoint and
watchpoint resources for unsupported debug architectures. This meant
that setting breakpoints on these architectures would appear to succeed,
although they would never fire in reality.

This patch fixes the breakpoint slot probing so that it returns 0 when
running on an unsupported debug architecture.
Reported-by: NUlrich Weigand <ulrich.weigand@de.ibm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Reading baseline CP14 registers, other than DBGDIDR, when the OS Lock
is set leads to UNPREDICTABLE behaviour.

This patch ensures that we clear the OS lock before accessing anything
other than the DBGDIDR, thereby avoiding this behaviour.
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

locomo_info isn't actually used as a platform_data on collie platform:
 arm/mach-sa1100/collie.c:237: warning: ‘locomo_info’ defined but not used

So locomo driver doesn't setup IRQs correctly. Pass locomo_info to the
driver.
Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

rmk says: "You might as well make OABI_COMPAT depend on !THUMB2_KERNEL.
OABI userland is useless without FPA support."

nwfpe doesn't work with Thumb-2 anyway and will probably never get
ported, so I can't argue with that.

This patch implements the dependency change.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Previously we were relying on it being pulled in by other headers for
the prototype of s3c24xx_irq_suspend() and s3c24xx_irq_resume().
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch cleans following up.
- Moved definition of System MMU IPNUM into mach/sysmmu.h
- Removed useless SYSMMU_DEBUG configuration
- Removed useless header file plat/sysmmu.h
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>